Searched +full:0 +full:x8a20000 (Results 1 – 5 of 5) sorted by relevance
48 reg = <0x8a20000 0x1000>;51 ranges = <0x0 0x8a20000 0x1000>;55 reg = <0x850 0x8>;58 resets = <&crg 0x188 4>;
37 reg = <0x8a20000 0x1000>;40 ranges = <0x0 0x8a20000 0x1000>;44 reg = <0x850 0x8>;47 resets = <&crg 0x188 4>;53 reg = <0x858 0x8>;56 resets = <&crg 0x188 12>;57 hisilicon,mode-select-bits = <0x0008 11 (0x3 << 11)>;
14 - #size-cells: Must be 0.22 - #phy-cells: Defined by generic PHY bindings. Must be 0.31 reg = <0x8a20000 0x1000>;34 ranges = <0x0 0x8a20000 0x1000>;38 reg = <0x12[all...]
27 #size-cells = <0>;29 cpu@0 {32 reg = <0x0 0x0>;34 d-cache-size = <0x8000>; /* 32 KiB */37 i-cache-size = <0x8000>; /* 32 KiB */46 reg = <0x0 0x1>;48 d-cache-size = <0x8000>; /* 32 KiB */51 i-cache-size = <0x8000>; /* 32 KiB */60 reg = <0x0 0x2>;62 d-cache-size = <0x8000>; /* 32 KiB */[all …]
68 cpu 2, reg + 0x4;69 cpu 3, reg + 0x8;79 reg = <0xfc802000 0x1000>;80 smp-offset = <0x31c>;81 resume-offset = <0x308>;82 reboot-offset = <0x4>;103 reg = <0x8a20000 0x1000>;125 reg = <0x0 0xf7030000 0x0 0x2000>;145 reg = <0x0 0xf7800000 0x0 0x2000>;165 reg = <0x0 0xf4410000 0x0 0x1000>;[all …]