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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dpmk8350.dtsi13 #define PMK8350_SID 0
21 mode-recovery = <0x01>;
22 mode-bootloader = <0x02>;
31 #size-cells = <0>;
35 reg = <0x1300>, <0x800>;
40 interrupts = <PMK8350_SID 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
47 interrupts = <PMK8350_SID 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
54 reg = <0x3100>;
56 #size-cells = <0>;
57 interrupts = <PMK8350_SID 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
[all …]
H A Dsc8280xp-pmics.dtsi23 hysteresis = <0>;
29 hysteresis = <0>;
43 hysteresis = <0>;
49 hysteresis = <0>;
63 hysteresis = <0>;
69 hysteresis = <0>;
83 hysteresis = <0>;
89 hysteresis = <0>;
98 pmk8280: pmic@0 {
100 reg = <0x0 SPMI_USID>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dsocionext,uniphier-ave4.yaml124 reg = <0x65000000 0x8500>;
125 interrupts = <0 66 4>;
132 socionext,syscon-phy-mode = <&soc_glue 0>;
136 #size-cells = <0>;
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dep8248e.dts26 #size-cells = <0>;
28 PowerPC,8248@0 {
30 reg = <0>;
35 timebase-frequency = <0>;
36 clock-frequency = <0>;
46 reg = <0xf0010100 0x40>;
48 ranges = <0 0 0xfc000000 0x04000000
49 1 0 0xfa000000 0x00008000>;
51 flash@0,3800000 {
53 reg = <0 0x3800000 0x800000>;
[all …]
H A Dpq2fads.dts26 #size-cells = <0>;
28 cpu@0 {
30 reg = <0x0>;
35 timebase-frequency = <0>;
36 clock-frequency = <0>;
42 reg = <0x0 0x0>;
50 reg = <0xf0010100 0x60>;
52 ranges = <0x0 0x0 0xff800000 0x800000
53 0x1 0x0 0xf4500000 0x8000
54 0x8 0x0 0xf8200000 0x8000>;
[all …]
H A Dmgcoge.dts23 #size-cells = <0>;
25 PowerPC,8247@0 {
27 reg = <0>;
32 timebase-frequency = <0>; /* Filled in by U-Boot */
33 clock-frequency = <0>; /* Filled in by U-Boot */
34 bus-frequency = <0>; /* Filled in by U-Boot */
44 reg = <0xf0010100 0x40>;
46 ranges = <0 0 0xfe000000 0x00400000
47 1 0 0x30000000 0x00010000
48 2 0 0x40000000 0x00010000
[all …]
H A Dmpc8272ads.dts25 #size-cells = <0>;
27 PowerPC,8272@0 {
29 reg = <0x0>;
34 timebase-frequency = <0>;
35 bus-frequency = <0>;
36 clock-frequency = <0>;
42 reg = <0x0 0x0>;
50 reg = <0xf0010100 0x40>;
52 ranges = <0x0 0x0 0xff800000 0x00800000
53 0x1 0x0 0xf4500000 0x8000
[all …]
/freebsd/sys/contrib/device-tree/src/arm/amlogic/
H A Dmeson.dtsi28 reg = <0xc1100000 0x200000>;
31 ranges = <0x0 0xc1100000 0x200000>;
37 reg = <0x4000 0x400>;
44 reg = <0x5400 0x2ac>;
53 reg = <0x7c00 0x200>;
58 reg = <0x8100 0x8>;
63 reg = <0x84c0 0x18>;
71 reg = <0x84dc 0x18>;
78 reg = <0x8500 0x20>;
81 #size-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/socionext/
H A Duniphier-pxs3.dtsi21 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0 0x000>;
54 reg = <0 0x001>;
65 reg = <0 0x002>;
76 reg = <0 0x00
[all...]
H A Duniphier-ld11.dtsi20 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0 0x000>;
46 reg = <0 0x001>;
102 #clock-cells = <0>;
126 reg = <0x0 0x81000000 0x
[all...]
H A Duniphier-ld20.dtsi21 #size-cells = <0>;
43 cpu0: cpu@0 {
46 reg = <0 0x000>;
57 reg = <0 0x001>;
68 reg = <0 0x100>;
79 reg = <0 0x10
[all...]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam43xx-clocks.dtsi9 #clock-cells = <0>;
14 reg = <0x0040>;
18 #clock-cells = <0>;
23 reg = <0x0040>;
27 #clock-cells = <0>;
32 reg = <0x0040>;
36 #clock-cells = <0>;
45 #clock-cells = <0>;
54 #clock-cells = <0>;
63 #clock-cells = <0>;
[all …]
/freebsd/sys/dev/etherswitch/ar40xx/
H A Dar40xx_hw_psgmii.c88 0, sc->sc_psgmii_mem_size, BUS_SPACE_BARRIER_WRITE); in ar40xx_hw_psgmii_reg_write()
97 0, sc->sc_psgmii_mem_size, BUS_SPACE_BARRIER_READ); in ar40xx_hw_psgmii_reg_read()
109 0x2200); in ar40xx_hw_psgmii_set_mac_mode()
111 0x8380); in ar40xx_hw_psgmii_set_mac_mode()
117 return (0); in ar40xx_hw_psgmii_set_mac_mode()
130 MDIO_WRITEREG(sc->sc_mdio_dev, phy, 0x0, 0x9000); in ar40xx_hw_psgmii_single_phy_testing()
131 MDIO_WRITEREG(sc->sc_mdio_dev, phy, 0x0, 0x4140); in ar40xx_hw_psgmii_single_phy_testing()
133 for (j = 0; j < AR40XX_PSGMII_CALB_NUM; j++) { in ar40xx_hw_psgmii_single_phy_testing()
136 status = MDIO_READREG(sc->sc_mdio_dev, phy, 0x11); in ar40xx_hw_psgmii_single_phy_testing()
151 ar40xx_hw_phy_mmd_write(sc, phy, 7, 0x8029, 0x0000); in ar40xx_hw_psgmii_single_phy_testing()
[all …]
/freebsd/usr.sbin/ppp/
H A Dhdlc.c64 /* 00 */ 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
65 /* 08 */ 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
66 /* 10 */ 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
67 /* 18 */ 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
68 /* 20 */ 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
69 /* 28 */ 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
70 /* 30 */ 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
71 /* 38 */ 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
72 /* 40 */ 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
73 /* 48 */ 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Ddove.dtsi22 #size-cells = <0>;
24 cpu0: cpu@0 {
28 reg = <0>;
34 marvell,tauros2-cache-features = <0>;
46 #size-cells = <0>;
51 pinctrl-0 = <&pmx_i2cmux_0>;
55 i2c0: i2c@0 {
56 reg = <0>;
58 #size-cells = <0>;
65 #size-cells = <0>;
[all …]
/freebsd/sys/netgraph/
H A Dng_async.c68 #define MODE_HUNT 0
91 #define ERROUT(x) do { error = (x); goto done; } while (0)
151 { 0 }
185 sc->cfg.accm = ~0; in nga_constructor()
194 return (0); in nga_constructor()
231 return (0); in nga_newhook()
257 int error = 0; in nga_rcvmsg()
303 sc->slen = 0; in nga_rcvmsg()
307 sc->slen = 0; in nga_rcvmsg()
345 return (0); in nga_shutdown()
[all …]
H A Dng_pred1.c54 #define PRED1_TABLE_SIZE 0x10000
56 #define PPP_INITFCS 0xffff /* Initial FCS value */
57 #define PPP_GOODFCS 0xf0b8 /* Good final FCS value */
159 { 0 }
176 #define ERROUT(x) do { error = (x); goto done; } while (0)
199 return (0); in ng_pred1_constructor()
210 if (NG_NODE_NUMHOOKS(node) > 0) in ng_pred1_newhook()
213 if (strcmp(name, NG_PRED1_HOOK_COMP) == 0) in ng_pred1_newhook()
215 else if (strcmp(name, NG_PRED1_HOOK_DECOMP) == 0) in ng_pred1_newhook()
216 priv->compress = 0; in ng_pred1_newhook()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/socionext/
H A Duniphier-pro4.dtsi18 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
45 #clock-cells = <0>;
50 #clock-cells = <0>;
65 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
66 <0x506c0000 0x400>;
79 reg = <0x54006000 0x100>;
81 #size-cells = <0>;
84 pinctrl-0 = <&pinctrl_spi0>;
[all …]
H A Duniphier-pxs2.dtsi19 #size-cells = <0>;
21 cpu0: cpu@0 {
24 reg = <0>;
112 #clock-cells = <0>;
117 #clock-cells = <0>;
163 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
164 <0x506c0000 0x400>;
179 reg = <0x54006000 0x100>;
181 #size-cells = <0>;
184 pinctrl-0 = <&pinctrl_spi0>;
[all …]
/freebsd/sys/dev/superio/
H A Dsuperio.c110 bus_write_1(res, 0, reg); in sio_read()
129 bus_write_1(res, 0, reg); in sio_write()
170 printf("ignored attempt to write special register 0x%x\n", reg); in sio_ldn_write()
189 sc->current_ldn = 0xff; in sio_conf_exit()
196 bus_write_1(res, 0, 0x87); in ite_conf_enter()
197 bus_write_1(res, 0, 0x01); in ite_conf_enter()
198 bus_write_1(res, 0, 0x55); in ite_conf_enter()
199 bus_write_1(res, 0, port == 0x2e ? 0x55 : 0xaa); in ite_conf_enter()
205 sio_write(res, 0x02, 0x02); in ite_conf_exit()
217 bus_write_1(res, 0, 0x87); in nvt_conf_enter()
[all …]
/freebsd/sys/dev/bxe/
H A D57711_int_offsets.h31 { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE
32 { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE
33 { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE
34 { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE
35 { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE
36 { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE
37 { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE
38 { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE
39 { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID
40 …{ 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVEN…
[all …]
/freebsd/sys/dev/usb/net/
H A Dif_axe.c121 * 0 2048 bytes
136 static int axe_debug = 0;
138 static SYSCTL_NODE(_hw_usb, OID_AUTO, axe, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
140 SYSCTL_INT(_hw_usb_axe, OID_AUTO, debug, CTLFLAG_RWTUN, &axe_debug, 0,
149 AXE_DEV(ABOCOM, UF200, 0),
150 AXE_DEV(ACERCM, EP1427X2, 0),
152 AXE_DEV(ASIX, AX88172, 0),
158 AXE_DEV(ATEN, UC210T, 0),
160 AXE_DEV(BILLIONTON, USB2AR, 0),
162 AXE_DEV(COREGA, FETHER_USB2_TX, 0),
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dr8a779h0.dtsi20 #clock-cells = <0>;
21 clock-frequency = <0>;
27 #clock-cells = <0>;
28 clock-frequency = <0>;
31 cluster0_opp: opp-table-0 {
48 #size-cells = <0>;
67 a76_0: cpu@0 {
69 reg = <0>;
81 reg = <0x100>;
93 reg = <0x200>;
[all …]
H A Dr8a779g0.dtsi20 #clock-cells = <0>;
21 clock-frequency = <0>;
27 #clock-cells = <0>;
28 clock-frequency = <0>;
31 cluster0_opp: opp-table-0 {
66 #size-cells = <0>;
88 a76_0: cpu@0 {
90 reg = <0>;
102 reg = <0x100>;
114 reg = <0x10000>;
[all …]
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dosprey_reg_map.h86 volatile char pad__0[0x8]; /* 0x0 - 0x8 */
87 volatile u_int32_t MAC_DMA_CR; /* 0x8 - 0xc */
88 volatile char pad__1[0x8]; /* 0xc - 0x14 */
89 volatile u_int32_t MAC_DMA_CFG; /* 0x14 - 0x18 */
90 volatile u_int32_t MAC_DMA_RXBUFPTR_THRESH; /* 0x18 - 0x1c */
91 volatile u_int32_t MAC_DMA_TXDPPTR_THRESH; /* 0x1c - 0x20 */
92 volatile u_int32_t MAC_DMA_MIRT; /* 0x20 - 0x24 */
93 volatile u_int32_t MAC_DMA_GLOBAL_IER; /* 0x24 - 0x28 */
94 volatile u_int32_t MAC_DMA_TIMT; /* 0x28 - 0x2c */
95 volatile u_int32_t MAC_DMA_RIMT; /* 0x2c - 0x30 */
[all …]

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