/titanic_52/usr/src/boot/sys/boot/fdt/dts/arm/ |
H A D | armada-380.dtsi | 59 #size-cells = <0>; 62 cpu@0 { 65 reg = <0>; 85 bus-range = <0x00 0xff>; 88 <0x82000000 0 0x80000 MBUS_ID(0xf0, 0x0 [all...] |
/illumos-gate/usr/src/common/ficl/test/ |
H A D | ficltest.fr | 6 : local1 { a b c | clr -- c b a 0 } 10 : local2 { | clr -- 0 } clr ; 35 { 1 2 3 local1 -> 3 2 1 0 } 36 { local2 -> 0 } 37 { 1 local2 -> 1 0 } 53 { -1 1 0 within -> true } 54 { 0 1s 2 within -> true } 55 { -100 0 -1 within -> true } 60 { 0x80000000 0x7f000000 0x81000000 within -> true } 75 0 [if] [all …]
|
/titanic_52/usr/src/common/ficl/test/ |
H A D | ficltest.fr | 6 : local1 { a b c | clr -- c b a 0 } 10 : local2 { | clr -- 0 } clr ; 35 { 1 2 3 local1 -> 3 2 1 0 } 36 { local2 -> 0 } 37 { 1 local2 -> 1 0 } 53 { -1 1 0 within -> true } 54 { 0 1s 2 within -> true } 55 { -100 0 -1 within -> true } 60 { 0x80000000 0x7f00000 [all...] |
/illumos-gate/usr/src/uts/sparc/dtrace/ |
H A D | dtrace_isa.c | 40 #define DTRACE_FMT3OP3_MASK 0x81000000 41 #define DTRACE_FMT3OP3 0x80000000 45 #define DTRACE_RMASK 0x1f 50 #define DTRACE_RET 0x81c7e008 51 #define DTRACE_RETL 0x81c3e008 52 #define DTRACE_SAVE_MASK 0xc1f80000 53 #define DTRACE_SAVE 0x81e00000 54 #define DTRACE_RESTORE 0x81e80000 55 #define DTRACE_CALL_MASK 0xc0000000 56 #define DTRACE_CALL 0x40000000 [all …]
|
/titanic_52/usr/src/uts/sparc/dtrace/ |
H A D | dtrace_isa.c | 40 #define DTRACE_FMT3OP3_MASK 0x81000000 41 #define DTRACE_FMT3OP3 0x80000000 45 #define DTRACE_RMASK 0x1f 50 #define DTRACE_RET 0x81c7e008 51 #define DTRACE_RETL 0x81c3e008 52 #define DTRACE_SAVE_MASK 0xc1f80000 53 #define DTRACE_SAVE 0x81e00000 54 #define DTRACE_RESTORE 0x81e80000 55 #define DTRACE_CALL_MASK 0xc000000 [all...] |
/illumos-gate/usr/src/common/crypto/aes/amd64/ |
H A D | aestab2.h | 49 0x00000001, 0x00000002, 0x00000004, 0x00000008, 50 0x00000010, 0x00000020, 0x00000040, 0x00000080, 51 0x0000001b, 0x00000036 57 0x00000063, 0x0000007c, 0x00000077, 0x0000007b, 58 0x000000f2, 0x0000006b, 0x0000006f, 0x000000c5, 59 0x00000030, 0x00000001, 0x00000067, 0x0000002b, 60 0x000000fe, 0x000000d7, 0x000000ab, 0x00000076, 61 0x000000ca, 0x00000082, 0x000000c9, 0x0000007d, 62 0x000000fa, 0x00000059, 0x00000047, 0x000000f0, 63 0x000000ad, 0x000000d4, 0x000000a2, 0x000000af, [all …]
|
/titanic_52/usr/src/common/crypto/aes/amd64/ |
H A D | aestab2.h | 51 0x00000001, 0x00000002, 0x00000004, 0x00000008, 52 0x00000010, 0x00000020, 0x00000040, 0x00000080, 53 0x0000001b, 0x0000003 [all...] |
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/mcp/ |
H A D | shmem.h | 8 #define FUNC_0 0 20 #define VN_0 0 44 #define MFW_TRACE_SIGNATURE 0x54524342 54 #define LINK_STATUS_NONE (0<<0) 55 #define LINK_STATUS_LINK_FLAG_MASK 0x00000001 56 #define LINK_STATUS_LINK_UP 0x00000001 57 #define LINK_STATUS_SPEED_AND_DUPLEX_MASK 0x0000001E 58 #define LINK_STATUS_SPEED_AND_DUPLEX_AN_NOT_COMPLETE (0<<1) 75 #define LINK_STATUS_AUTO_NEGOTIATE_FLAG_MASK 0x00000020 76 #define LINK_STATUS_AUTO_NEGOTIATE_ENABLED 0x00000020 [all …]
|
/titanic_52/usr/src/uts/common/io/bnxe/577xx/hsi/mcp/ |
H A D | shmem.h | 8 #define FUNC_0 0 20 #define VN_0 0 44 #define MFW_TRACE_SIGNATURE 0x54524342 54 #define LINK_STATUS_NONE (0<<0) 55 #define LINK_STATUS_LINK_FLAG_MASK 0x00000001 56 #define LINK_STATUS_LINK_UP 0x00000001 57 #define LINK_STATUS_SPEED_AND_DUPLEX_MASK 0x0000001E 58 #define LINK_STATUS_SPEED_AND_DUPLEX_AN_NOT_COMPLETE (0<<1) 75 #define LINK_STATUS_AUTO_NEGOTIATE_FLAG_MASK 0x0000002 [all...] |
/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/ |
H A D | ecore_init_values.h | 42 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */ 43 0x00020002, 0x00450000, /* if mode != '!asic', skip 2 ops */ 44 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */ 45 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */ 47 0x00060003, 0xffff0000, /* if phase != 'engine', skip 6 ops (no DMAE) */ 48 0x00030002, 0x00450000, /* if mode != '!asic', skip 3 ops */ 49 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */ 50 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */ 51 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */ 52 0x00010002, 0x00ac0000, /* if mode != '(!asic)&bb', skip 1 ops */ [all …]
|
/titanic_52/usr/src/uts/common/io/fibre-channel/fca/qlc/ |
H A D | ql_fw_8100.c | 60 uint32_t fw8100midq_addr01 = 0x00100000; 62 uint32_t risc_code_addr01 = 0x00100000; 70 0x0501f042, 0x0010f000, 0x00100000, 0x0000a467, 71 0x00000005, 0x00000003, 0x00000002, 0x000008d [all...] |
H A D | ql_fw_2500.c | 59 uint32_t fw2500midq_addr01 = 0x00100000; 61 uint32_t risc_code_addr01 = 0x00100000; 69 0x0501f042, 0x00111000, 0x00100000, 0x0000bbb5, 70 0x00000005, 0x00000003, 0x00000001, 0x000000d [all...] |
H A D | ql_fw_2400.c | 59 uint32_t fw2400mid_addr01 = 0x00100000; 61 uint32_t risc_code_addr01 = 0x00100000; 69 0x0401f195, 0x00111000, 0x00100000, 0x0000bcfe, 70 0x00000005, 0x00000003, 0x00000001, 0x0000049 [all...] |
/illumos-gate/usr/src/uts/common/io/comstar/port/qlt/ |
H A D | 8300fc.c | 37 uint32_t fw8300fc_version_str[] = {8, 2, 0}; 39 uint32_t firmware_version[] = {8, 2, 0}; 56 uint32_t fw8300fc_addr01 = 0x00100000; 58 uint32_t risc_code_addr01 = 0x00100000; 66 0x0501f06c, 0x00119000, 0x00100000, 0x00010b51, 67 0x00000008, 0x00000002, 0x00000000, 0x0270d0d5, 68 0x00000020, 0x00000006, 0x20434f50, 0x59524947, 69 0x48542032, 0x30313520, 0x514c4f47, 0x49432043, 70 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 71 0x38337878, 0x20466972, 0x6d776172, 0x65202020, [all …]
|
H A D | 8100.c | 37 uint32_t fw8100_version_str[] = {8, 2, 0}; 39 uint32_t firmware_version[] = {8, 2, 0}; 59 uint32_t fw8100_addr01 = 0x00100000; 61 uint32_t risc_code_addr01 = 0x00100000; 69 0x0501f06c, 0x00118000, 0x00100000, 0x0000c352, 70 0x00000008, 0x00000002, 0x00000000, 0x0010d8d4, 71 0x00000008, 0x00000000, 0x20434f50, 0x59524947, 72 0x48542032, 0x30313520, 0x514c4f47, 0x49432043, 73 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 74 0x38317878, 0x20466972, 0x6d776172, 0x65202020, [all …]
|
H A D | 2700.c | 37 uint32_t fw2700_version_str[] = {8, 2, 0}; 39 uint32_t firmware_version[] = {8, 2, 0}; 59 uint32_t fw2700_addr01 = 0x00100000; 61 uint32_t risc_code_addr01 = 0x00100000; 69 0x0501f06c, 0x0011e000, 0x00100000, 0x00011cc0, 70 0x00000008, 0x00000002, 0x00000000, 0x0258d0d5, 71 0x00000040, 0x00000006, 0x20434f50, 0x59524947, 72 0x48542032, 0x30313520, 0x514c4f47, 0x49432043, 73 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 74 0x32377878, 0x20466972, 0x6d776172, 0x65202020, [all …]
|
H A D | 2400.c | 37 uint32_t fw2400_version_str[] = {8, 2, 0}; 39 uint32_t firmware_version[] = {8, 2, 0}; 50 uint32_t fw2400_addr01 = 0x00100000; 52 uint32_t risc_code_addr01 = 0x00100000; 60 0x0401f1be, 0x00110000, 0x00100000, 0x0000b56b, 61 0x00000008, 0x00000002, 0x00000000, 0x00008482, 62 0x00000003, 0x00000000, 0x20434f50, 0x59524947, 63 0x48542032, 0x30313520, 0x514c4f47, 0x49432043, 64 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 65 0x32347878, 0x20466972, 0x6d776172, 0x65202020, [all …]
|
H A D | 2500.c | 37 uint32_t fw2500_version_str[] = {8, 2, 0}; 39 uint32_t firmware_version[] = {8, 2, 0}; 50 uint32_t fw2500_addr01 = 0x00100000; 52 uint32_t risc_code_addr01 = 0x00100000; 60 0x0501f06b, 0x00116000, 0x00100000, 0x0000d9c1, 61 0x00000008, 0x00000002, 0x00000000, 0x001090d5, 62 0x00000004, 0x00000000, 0x20434f50, 0x59524947, 63 0x48542032, 0x30313520, 0x514c4f47, 0x49432043, 64 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 65 0x32357878, 0x20466972, 0x6d776172, 0x65202020, [all …]
|
/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/qlc/ |
H A D | ql_fw_8301fc.c | 43 uint32_t fw8300fciov_version_str[] = {8, 3, 0}; 45 uint32_t firmware_version[] = {8, 3, 0}; 62 uint32_t fw8300fciov_addr01 = 0x00100000; 64 uint32_t risc_code_addr01 = 0x00100000; 72 0x0501f06c, 0x00119000, 0x00100000, 0x00010a64, 73 0x00000008, 0x00000003, 0x00000000, 0x0270d0d5, 74 0x00000020, 0x00000006, 0x20434f50, 0x59524947, 75 0x48542032, 0x30313520, 0x514c4f47, 0x49432043, 76 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 77 0x38337878, 0x20466972, 0x6d776172, 0x65202020, [all …]
|
H A D | ql_fw_8100.c | 44 uint32_t fw8100midq_version_str[] = {8, 2, 0}; 46 uint32_t firmware_version[] = {8, 2, 0}; 66 uint32_t fw8100midq_addr01 = 0x00100000; 68 uint32_t risc_code_addr01 = 0x00100000; 76 0x0501f06c, 0x00118000, 0x00100000, 0x0000c352, 77 0x00000008, 0x00000002, 0x00000000, 0x0010d8d4, 78 0x00000008, 0x00000000, 0x20434f50, 0x59524947, 79 0x48542032, 0x30313520, 0x514c4f47, 0x49432043, 80 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 81 0x38317878, 0x20466972, 0x6d776172, 0x65202020, [all …]
|
H A D | ql_fw_2700.c | 43 uint32_t fw2700fciov_version_str[] = {8, 3, 0}; 45 uint32_t firmware_version[] = {8, 3, 0}; 65 uint32_t fw2700fciov_addr01 = 0x00100000; 67 uint32_t risc_code_addr01 = 0x00100000; 75 0x0501f06c, 0x0011e000, 0x00100000, 0x00011f40, 76 0x00000008, 0x00000003, 0x00000000, 0x0258d0d5, 77 0x00000040, 0x00000006, 0x20434f50, 0x59524947, 78 0x48542032, 0x30313520, 0x514c4f47, 0x49432043, 79 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 80 0x32377878, 0x20466972, 0x6d776172, 0x65202020, [all …]
|
H A D | ql_fw_2500.c | 43 uint32_t fw2500midq_version_str[] = {8, 2, 0}; 45 uint32_t firmware_version[] = {8, 2, 0}; 56 uint32_t fw2500midq_addr01 = 0x00100000; 58 uint32_t risc_code_addr01 = 0x00100000; 66 0x0501f06b, 0x00116000, 0x00100000, 0x0000d9c1, 67 0x00000008, 0x00000002, 0x00000000, 0x001090d5, 68 0x00000004, 0x00000000, 0x20434f50, 0x59524947, 69 0x48542032, 0x30313520, 0x514c4f47, 0x49432043, 70 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 71 0x32357878, 0x20466972, 0x6d776172, 0x65202020, [all …]
|
/titanic_52/usr/src/uts/common/io/comstar/port/qlt/ |
H A D | 8100.c | 49 uint32_t fw8100_addr01 = 0x00100000; 51 uint32_t risc_code_addr01 = 0x00100000; 59 0x0501f042, 0x0010b000, 0x00100000, 0x00008c22, 60 0x00000005, 0x00000002, 0x00000001, 0x0000088 [all...] |
H A D | 2500.c | 49 uint32_t fw2500_addr01 = 0x00100000; 51 uint32_t risc_code_addr01 = 0x00100000; 59 0x0501f042, 0x0010d000, 0x00100000, 0x0000894f, 60 0x00000005, 0x00000002, 0x00000001, 0x0000008 [all...] |
H A D | 2400.c | 49 uint32_t fw2400_addr01 = 0x00100000; 51 uint32_t risc_code_addr01 = 0x00100000; 59 0x0401f195, 0x00110000, 0x00100000, 0x0000ad52, 60 0x00000005, 0x00000002, 0x00000001, 0x0000048 [all...] |