Searched +full:0 +full:x8000f000 (Results 1 – 3 of 3) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | ux500.txt | 21 possible values are 0 thru 31. 27 possible values are 0 thru 31. 41 reg = <0x8012f000 0x1000>, <0x8011f000 0x1000>, 42 <0x8000f000 0x1000>, <0xa03ff000 0x1000>, 43 <0xa03cf000 0x1000>; 58 #clock-cells = <0>; 62 #clock-cells = <0>;
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H A D | stericsson,u8500-clks.yaml | 54 wants, possible values are 0 thru 31. 68 values are 0 thru 31. 82 it wants to control, possible values are 0 thru 31. 97 const: 0 108 const: 0 122 possible values are 0 (CLKOUT1) and 1 (CLKOUT2). 124 possible values are 0 thru 7, see the defines for the different 147 reg = <0x8012f000 0x1000>, <0x8011f000 0x1000>, 148 <0x8000f000 0x1000>, <0xa03ff000 0x1000>, 149 <0xa03cf000 0x1000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | ste-dbx5x0.dtsi | 40 #size-cells = <0>; 56 reg = <0x300>; 65 reg = <0x301>; 81 polling-delay = <0>; 93 hysteresis = <0>; 121 /* The first (always on) ESRAM 0, 128 KB */ 123 reg = <0x40000000 0x20000>; 126 ranges = <0 0x4000000 [all...] |