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/freebsd/sys/contrib/device-tree/src/arm/nuvoton/
H A Dnuvoton-npcm750.dtsi14 #size-cells = <0>;
17 cpu@0 {
22 reg = <0>;
39 reg = <0x3fe600 0x20>;
50 reg = <0xf0804000 0x2000>;
57 pinctrl-0 = <&rg2_pins
64 reg = <0xf0830000 0x1000
65 0xfffd0000 0x800>;
77 reg = <0xf0831000 0x1000
78 0xfffd0800 0x800>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dmediatek,vcodec-decoder.yaml150 reg = <0x16020000 0x1000>, /*VDEC_MISC*/
151 <0x16021000 0x800>, /*VDEC_LD*/
152 <0x16021800 0x800>, /*VDEC_TOP*/
153 <0x16022000 0x1000>, /*VDEC_CM*/
154 <0x16023000 0x1000>, /*VDEC_AD*/
155 <0x16024000 0x1000>, /*VDEC_AV*/
156 <0x16025000 0x1000>, /*VDEC_PP*/
157 <0x16026800 0x800>, /*VP8_VD*/
158 <0x16027000 0x800>, /*VP6_VD*/
159 <0x16027800 0x800>, /*VP8_VL*/
[all …]
H A Dmediatek-vcodec.txt38 reg = <0 0x16000000 0 0x100>, /*VDEC_SYS*/
39 <0 0x16020000 0 0x1000>, /*VDEC_MISC*/
40 <0 0x16021000 0 0x800>, /*VDEC_LD*/
41 <0 0x16021800 0 0x800>, /*VDEC_TOP*/
42 <0 0x16022000 0 0x1000>, /*VDEC_CM*/
43 <0 0x16023000 0 0x1000>, /*VDEC_AD*/
44 <0 0x16024000 0 0x1000>, /*VDEC_AV*/
45 <0 0x16025000 0 0x1000>, /*VDEC_PP*/
46 <0 0x16026800 0 0x800>, /*VP8_VD*/
47 <0 0x16027000 0 0x800>, /*VP6_VD*/
[all …]
/freebsd/sys/contrib/device-tree/Bindings/hsi/
H A Domap-ssi.txt37 0 and 1 (in this order).
55 reg = <0x48058000 0x1000>,
56 <0x48059000 0x1000>;
77 reg = <0x4805a000 0x800>,
78 <0x4805a800 0x800>;
92 reg = <0x4805b000 0x800>,
93 <0x4805b800 0x800>;
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dmicrowatt.dts5 #size-cells = <0x02>;
6 #address-cells = <0x02>;
16 #size-cells = <0x02>;
17 #address-cells = <0x02>;
21 memory@0 {
23 reg = <0x00000000 0x00000000 0x00000000 0x10000000>;
28 #clock-cells = <0>;
35 #size-cells = <0x00>;
36 #address-cells = <0x01>;
47 os-support = <0>;
[all …]
H A Dmpc7448hpc2.dts29 #size-cells =<0>;
31 PowerPC,7448@0 {
33 reg = <0x0>;
36 d-cache-size = <0x8000>; // L1, 32K bytes
37 i-cache-size = <0x8000>; // L1, 32K bytes
38 timebase-frequency = <0>; // 33 MHz, from uboot
39 clock-frequency = <0>; // From U-Boot
40 bus-frequency = <0>; // From U-Boot
46 reg = <0x0 0x20000000 // DDR2 512M at 0
54 ranges = <0x0 0xc0000000 0x10000>;
[all …]
H A Dholly.dts23 #size-cells =<0>;
24 PowerPC,750CL@0 {
26 reg = <0x00000000>;
39 memory@0 {
41 reg = <0x00000000 0x20000000>;
49 ranges = <0x00000000 0xc0000000 0x00010000>;
50 reg = <0xc0000000 0x00010000>;
56 interrupts = <0xe 0x2>;
57 reg = <0x00007000 0x00000400>;
62 reg = <0x00006000 0x00000050>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dsama7d65.dtsi27 #size-cells = <0>;
29 cpu0: cpu@0 {
31 reg = <0x0>;
35 d-cache-size = <0x8000>; // L1, 32 KB
36 i-cache-size = <0x8000>; // L1, 32 KB
42 cache-size = <0x40000>; // L2, 256 KB
52 #clock-cells = <0>;
58 #clock-cells = <0>;
64 reg = <0x100000 0x20000>;
78 reg = <0xe0000800 0x4000>;
[all …]
H A Dsam9x7.dtsi36 #size-cells = <0>;
38 cpu@0 {
40 reg = <0>;
49 #clock-cells = <0>;
55 #clock-cells = <0>;
61 reg = <0x300000 0x10000>;
62 ranges = <0 0x300000 0x10000>;
75 reg = <0x80000000 0x300>;
76 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
86 reg = <0x90000000 0x300>;
[all …]
H A Dsam9x60.dtsi37 #size-cells = <0>;
39 cpu@0 {
42 reg = <0>;
48 reg = <0x20000000 0x10000000>;
54 #clock-cells = <0>;
59 #clock-cells = <0>;
65 reg = <0x00300000 0x100000>;
68 ranges = <0 0x00300000 0x100000>;
79 #size-cells = <0>;
81 reg = <0x00500000 0x100000
[all …]
H A Dsama7g5.dtsi31 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0x0>;
41 d-cache-size = <0x8000>; // L1, 32 KB
42 i-cache-size = <0x8000>; // L1, 32 KB
48 cache-size = <0x40000>; // L2, 256 KB
98 hysteresis = <0>;
104 hysteresis = <0>;
110 hysteresis = <0>;
133 #clock-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dlitex,liteeth.yaml56 minimum: 0x800
57 default: 0x800
78 reg = <0x8021000 0x100>,
79 <0x8020800 0x100>,
80 <0x8030000 0x2000>;
84 litex,slot-size = <0x800>;
85 interrupts = <0x11 0x1>;
90 #size-cells = <0>;
92 eth_phy: ethernet-phy@0 {
93 reg = <0>;
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-xp.dtsi35 reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
41 reg = <0x1400 0x500>;
46 reg = <0x08000 0x1000>;
47 cache-id-part = <0x100>;
55 pinctrl-0 = <&uart2_pins>;
57 reg = <0x12200 0x100>;
61 clocks = <&coreclk 0>;
67 pinctrl-0 = <&uart3_pins>;
69 reg = <0x12300 0x100>;
73 clocks = <&coreclk 0>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Dsamsung,exynos4210-mct.yaml71 0: Global Timer Interrupt 0
75 4: Local Timer Interrupt 0
172 reg = <0x10050000 0x800>;
192 reg = <0x101C0000 0x800>;
213 reg = <0x10050000 0x800>;
233 reg = <0x10050000 0x800>;
/freebsd/contrib/file/magic/Magdir/
H A Dxenix14 0 string core core file (Xenix)
20 0 byte 0x80
27 >>1 uleshort >0
29 >>>3 ubyte >0
31 >>>>(1.s+3) ubyte >0x6D
33 >>>>>(1.s+3) ubyte <0xF2 8086 relocatable (Microsoft)
50 0 leshort 0xff65 Microsoft x.out
52 >0 byte x archive
66 0 leshort 0x206
67 >0x1c byte&0xc0 =0x40 Microsoft x.out little-endian
[all …]
/freebsd/sys/dev/dpaa2/
H A Ddpaa2_mcp.h41 #define DPAA2_MCP_MEM_WIDTH 0x40 /* Minimal size of the MC portal. */
49 #define DPAA2_PORTAL_DEF 0x0u
50 #define DPAA2_PORTAL_NOWAIT_ALLOC 0x2u /* Do not sleep during init */
51 #define DPAA2_PORTAL_LOCKED 0x4000u /* Wait till portal's unlocked */
52 #define DPAA2_PORTAL_DESTROYED 0x8000u /* Terminate any operations */
55 #define DPAA2_CMD_DEF 0x0u
56 #define DPAA2_CMD_HIGH_PRIO 0x80u /* High priority command */
57 #define DPAA2_CMD_INTR_DIS 0x100u /* Disable cmd finished intr */
58 #define DPAA2_CMD_NOWAIT_ALLOC 0x8000u /* Do not sleep during init */
61 #define DPAA2_CMD_STAT_OK 0x0 /* Set by MC on success */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/
H A Dkeystone-k2g-netcp.dtsi13 power-domains = <&k2g_pds 0x0018>;
14 clocks = <&k2g_clks 0x0018 0>;
17 queue-range = <0 0x80>;
18 linkram0 = <0x4020000 0x7ff>;
26 managed-queues = <0 0x80>;
27 reg = <0x4100000 0x800>,
28 <0x4040000 0x100>,
29 <0x4080000 0x800>,
30 <0x40c0000 0x800>;
38 qpend-0 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp157.dtsi13 reg = <0x59000000 0x800>;
22 reg = <0x5a000000 0x800>;
32 #size-cells = <0>;
34 port@0 {
35 reg = <0>;
/freebsd/sys/contrib/device-tree/Bindings/display/panel/
H A Dorisetech,otm8009a.yaml7 title: Orise Tech OTM8009A 3.97" 480x800 TFT LCD panel (MIPI-DSI video mode)
13 The Orise Tech OTM8009A is a 3.97" 480x800 TFT LCD panel connected using
44 #size-cells = <0>;
45 panel@0 {
47 reg = <0>;
48 reset-gpios = <&gpiof 15 0>;
/freebsd/sys/isa/
H A Dpnp.c66 * The Gravis UltraSound needs register 0xf2 to be set to 0xff
70 { 0x0100561e /* GRV0001 */, 0,
71 PNP_QUIRK_WRITE_REG, 0xf2, 0xff },
76 { 0x26008c0e /* SB16 */, 0x21008c0e,
77 PNP_QUIRK_EXTRA_IO, 0x400, 0x80
[all...]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dphy-mvebu-utmi.txt23 - #phy-cells: Standard property (Documentation: phy-bindings.txt) Should be 0.
30 reg = <0x5f000 0x800>;
32 #phy-cells = <0>;
37 reg = <0x5f800 0x800>;
H A Dmarvell,armada-3700-utmi-phy.yaml28 const: 0
49 reg = <0x5f000 0x800>;
51 #phy-cells = <0>;
56 reg = <0x5f800 0x800>;
/freebsd/sys/contrib/device-tree/Bindings/arm/omap/
H A Dl4.txt27 reg = <0x48000000 0x800>,
28 <0x48000800 0x800>,
29 <0x48001000 0x400>,
30 <0x48001400 0x400>,
31 <0x48001800 0x400>,
32 <0x48001c00 0x400>;
36 ranges = <0 0x48000000 0x100000>;
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dlpc18xx-ccu.h13 #define CLK_APB3_BUS 0x100
14 #define CLK_APB3_I2C1 0x108
15 #define CLK_APB3_DAC 0x110
16 #define CLK_APB3_ADC0 0x118
17 #define CLK_APB3_ADC1 0x120
18 #define CLK_APB3_CAN0 0x128
19 #define CLK_APB1_BUS 0x200
20 #define CLK_APB1_MOTOCON_PWM 0x208
21 #define CLK_APB1_I2C0 0x210
22 #define CLK_APB1_I2S 0x218
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/bcm/
H A Dbrcm,brcmstb.txt49 ranges = <0 0x00 0xf0000000 0x1000000>;
53 reg = <0x404000 0x51c>;
58 reg = <0x3e2400 0x5b4>;
64 reg = <0x452000 0x100>;
94 syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>;
117 syscon = <&sun_top_ctrl 0x304 0x308>;
141 reg = <0x410000 0x400>;
170 "brcm,brcmstb-ddr-phy-v72.0"
182 - compatible : should contain "brcm,brcmstb-ddr-shimphy-v1.0"
199 memc@0 {
[all …]

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