/linux/lib/fonts/ |
H A D | font_ter16x32.c | 8 { 0, 0, FONTDATAMAX, 0 }, { 9 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 10 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc, 11 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 12 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 13 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 14 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 15 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00, 16 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0 */ 17 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, [all …]
|
H A D | font_10x18.c | 12 { 0, 0, FONTDATAMAX, 0 }, { 13 /* 0 0x00 '^@' */ 14 0x00, 0x00, /* 0000000000 */ 15 0x00, 0x00, /* 0000000000 */ 16 0x00, 0x00, /* 0000000000 */ 17 0x00, 0x00, /* 0000000000 */ 18 0x00, 0x00, /* 0000000000 */ 19 0x00, 0x00, /* 0000000000 */ 20 0x00, 0x00, /* 0000000000 */ 21 0x00, 0x00, /* 0000000000 */ [all …]
|
H A D | font_sun12x22.c | 7 { 0, 0, FONTDATAMAX, 0 }, { 8 /* 0 0x00 '^@' */ 9 0x00, 0x00, /* 000000000000 */ 10 0x00, 0x00, /* 000000000000 */ 11 0x00, 0x00, /* 000000000000 */ 12 0x00, 0x00, /* 000000000000 */ 13 0x00, 0x00, /* 000000000000 */ 14 0x00, 0x00, /* 000000000000 */ 15 0x00, 0x00, /* 000000000000 */ 16 0x00, 0x00, /* 000000000000 */ [all …]
|
/linux/drivers/gpu/drm/panel/ |
H A D | panel-samsung-s6e3ha2.c | 22 #define S6E3HA2_MIN_BRIGHTNESS 0 31 { 0x00, 0xb8, 0x00, 0xc3, 0x00, 0xb1, 0x89, 0x87, 0x87, 0x82, 0x83, 32 0x85, 0x88, 0x8b, 0x8b, 0x84, 0x88, 0x82, 0x82, 0x89, 0x86, 0x8c, 33 0x94, 0x84, 0xb1, 0xaf, 0x8e, 0xcf, 0xad, 0xc9, 0x00, 0x00, 0x00, 34 0x00, 0x00 }, 35 { 0x00, 0xb8, 0x00, 0xc3, 0x00, 0xb1, 0x89, 0x87, 0x87, 0x84, 0x84, 36 0x85, 0x87, 0x8b, 0x8a, 0x84, 0x88, 0x82, 0x82, 0x89, 0x86, 0x8a, 37 0x93, 0x84, 0xb0, 0xae, 0x8e, 0xc9, 0xa8, 0xc5, 0x00, 0x00, 0x00, 38 0x00, 0x00 }, 39 { 0x00, 0xb8, 0x00, 0xc3, 0x00, 0xb1, 0x89, 0x87, 0x87, 0x83, 0x83, [all …]
|
/linux/include/linux/mfd/ |
H A D | tps65910.h | 19 #define TPS65910 0 23 #define REGULATOR_LDO 0 31 #define TPS65910_SECONDS 0x0 32 #define TPS65910_MINUTES 0x1 33 #define TPS65910_HOURS 0x2 34 #define TPS65910_DAYS 0x3 35 #define TPS65910_MONTHS 0x4 36 #define TPS65910_YEARS 0x5 37 #define TPS65910_WEEKS 0x6 38 #define TPS65910_ALARM_SECONDS 0x8 [all …]
|
H A D | palmas.h | 24 #define PALMAS_CHIP_OLD_ID 0x0000 25 #define PALMAS_CHIP_ID 0xC035 26 #define PALMAS_CHIP_CHARGER_ID 0xC036 43 #define PALMAS_PMIC_FEATURE_SMPS10_BOOST BIT(0) 133 int ch3_current; /* 0: off; 1: 10uA; 2: 400uA; 3: 800 uA */ 135 /* Channel 0 current source can be used for battery detection. 139 int ch0_current; /* 0: off; 1: 5uA; 2: 15uA; 3: 20 uA */ 154 * 0: reload default values from OTP on warm reset 165 * 0: i2c selection of voltage 177 * 0: Off [all …]
|
/linux/drivers/scsi/aic7xxx/ |
H A D | aic7xxx_reg_print.c_shipped | 12 { "SCSIRSTO", 0x01, 0x01 }, 13 { "ENAUTOATNP", 0x02, 0x02 }, 14 { "ENAUTOATNI", 0x04, 0x04 }, 15 { "ENAUTOATNO", 0x08, 0x08 }, 16 { "ENRSELI", 0x10, 0x10 }, 17 { "ENSELI", 0x20, 0x20 }, 18 { "ENSELO", 0x40, 0x40 }, 19 { "TEMODE", 0x80, 0x80 } 26 0x00, regvalue, cur_col, wrap)); 30 { "CLRCHN", 0x02, 0x02 }, [all …]
|
H A D | aic7xxx_reg.h_shipped | 19 ahc_print_register(NULL, 0, "SCSISEQ", 0x00, regvalue, cur_col, wrap) 26 ahc_print_register(NULL, 0, "SXFRCTL0", 0x01, regvalue, cur_col, wrap) 33 ahc_print_register(NULL, 0, "SCSISIGI", 0x03, regvalue, cur_col, wrap) 40 ahc_print_register(NULL, 0, "SCSIRATE", 0x04, regvalue, cur_col, wrap) 47 ahc_print_register(NULL, 0, "SSTAT0", 0x0b, regvalue, cur_col, wrap) 54 ahc_print_register(NULL, 0, "SSTAT1", 0x0c, regvalue, cur_col, wrap) 61 ahc_print_register(NULL, 0, "SSTAT2", 0x0d, regvalue, cur_col, wrap) 68 ahc_print_register(NULL, 0, "SSTAT3", 0x0e, regvalue, cur_col, wrap) 75 ahc_print_register(NULL, 0, "SIMODE0", 0x10, regvalue, cur_col, wrap) 82 ahc_print_register(NULL, 0, "SIMODE1", 0x11, regvalue, cur_col, wrap) [all …]
|
H A D | aic79xx_reg.h_shipped | 19 ahd_print_register(NULL, 0, "INTSTAT", 0x01, regvalue, cur_col, wrap) 26 ahd_print_register(NULL, 0, "HS_MAILBOX", 0x0b, regvalue, cur_col, wrap) 33 ahd_print_register(NULL, 0, "SEQINTSTAT", 0x0c, regvalue, cur_col, wrap) 40 ahd_print_register(NULL, 0, "INTCTL", 0x18, regvalue, cur_col, wrap) 47 ahd_print_register(NULL, 0, "DFCNTRL", 0x19, regvalue, cur_col, wrap) 54 ahd_print_register(NULL, 0, "DFSTATUS", 0x1a, regvalue, cur_col, wrap) 61 ahd_print_register(NULL, 0, "SG_CACHE_SHADOW", 0x1b, regvalue, cur_col, wrap) 68 ahd_print_register(NULL, 0, "SCSISEQ0", 0x3a, regvalue, cur_col, wrap) 75 ahd_print_register(NULL, 0, "SCSISEQ1", 0x3b, regvalue, cur_col, wrap) 82 ahd_print_register(NULL, 0, "DFFSTAT", 0x3f, regvalue, cur_col, wrap) [all …]
|
H A D | aic79xx_reg_print.c_shipped | 12 { "SPLTINT", 0x01, 0x01 }, 13 { "CMDCMPLT", 0x02, 0x02 }, 14 { "SEQINT", 0x04, 0x04 }, 15 { "SCSIINT", 0x08, 0x08 }, 16 { "PCIINT", 0x10, 0x10 }, 17 { "SWTMINT", 0x20, 0x20 }, 18 { "BRKADRINT", 0x40, 0x40 }, 19 { "HWERRINT", 0x80, 0x80 }, 20 { "INT_PEND", 0xff, 0xff } 27 0x01, regvalue, cur_col, wrap)); [all …]
|
/linux/drivers/net/wireless/broadcom/b43/ |
H A D | radio_2055.c | 24 #define B2055_INITTAB_ENTRY_OK 0x01 25 #define B2055_INITTAB_UPLOAD 0x02 31 [B2055_SP_PINPD] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, }, 32 [B2055_C1_SP_RSSI] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, }, 33 [B2055_C1_SP_PDMISC] = { .ghz5 = 0x0027, .ghz2 = 0x0027, NOUPLOAD, }, 34 [B2055_C2_SP_RSSI] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, }, 35 [B2055_C2_SP_PDMISC] = { .ghz5 = 0x0027, .ghz2 = 0x0027, NOUPLOAD, }, 36 [B2055_C1_SP_RXGC1] = { .ghz5 = 0x007F, .ghz2 = 0x007F, UPLOAD, }, 37 [B2055_C1_SP_RXGC2] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, }, 38 [B2055_C2_SP_RXGC1] = { .ghz5 = 0x007F, .ghz2 = 0x007F, UPLOAD, }, [all …]
|
/linux/include/linux/mfd/da9052/ |
H A D | reg.h | 14 #define DA9052_PAGE0_CON_REG 0 176 #define DA9052_PAGE_CONF 0X80 179 #define DA9052_STATUSA_VDATDET 0X80 180 #define DA9052_STATUSA_VBUSSEL 0X40 181 #define DA9052_STATUSA_DCINSEL 0X20 182 #define DA9052_STATUSA_VBUSDET 0X10 183 #define DA9052_STATUSA_DCINDET 0X08 184 #define DA9052_STATUSA_IDGND 0X04 185 #define DA9052_STATUSA_IDFLOAT 0X02 186 #define DA9052_STATUSA_NONKEY 0X01 [all …]
|
/linux/drivers/isdn/hardware/mISDN/ |
H A D | hfc_multi.h | 6 #define DEBUG_HFCMULTI_FIFO 0x00010000 7 #define DEBUG_HFCMULTI_CRC 0x00020000 8 #define DEBUG_HFCMULTI_INIT 0x00040000 9 #define DEBUG_HFCMULTI_PLXSD 0x00080000 10 #define DEBUG_HFCMULTI_MODE 0x00100000 11 #define DEBUG_HFCMULTI_MSG 0x00200000 12 #define DEBUG_HFCMULTI_STATE 0x00400000 13 #define DEBUG_HFCMULTI_FILL 0x00800000 14 #define DEBUG_HFCMULTI_SYNC 0x01000000 15 #define DEBUG_HFCMULTI_DTMF 0x02000000 [all …]
|
/linux/drivers/net/ethernet/samsung/sxgbe/ |
H A D | sxgbe_reg.h | 13 #define SXGBE_CORE_TX_CONFIG_REG 0x0000 14 #define SXGBE_CORE_RX_CONFIG_REG 0x0004 15 #define SXGBE_CORE_PKT_FILTER_REG 0x0008 16 #define SXGBE_CORE_WATCHDOG_TIMEOUT_REG 0x000C 17 #define SXGBE_CORE_HASH_TABLE_REG0 0x0010 18 #define SXGBE_CORE_HASH_TABLE_REG1 0x0014 19 #define SXGBE_CORE_HASH_TABLE_REG2 0x0018 20 #define SXGBE_CORE_HASH_TABLE_REG3 0x001C 21 #define SXGBE_CORE_HASH_TABLE_REG4 0x0020 22 #define SXGBE_CORE_HASH_TABLE_REG5 0x0024 [all …]
|
/linux/drivers/media/pci/solo6x10/ |
H A D | solo6x10-tw28.c | 30 0x00, 0xf0, 0x70, 0x30, 0x80, 0x80, 0x00, 0x02, /* 0x00 */ 31 0x12, 0xf5, 0x0c, 0xd0, 0x00, 0x00, 0x00, 0x7f, 32 0x00, 0xf0, 0x70, 0x30, 0x80, 0x80, 0x00, 0x02, /* 0x10 */ 33 0x12, 0xf5, 0x0c, 0xd0, 0x00, 0x00, 0x00, 0x7f, 34 0x00, 0xf0, 0x70, 0x30, 0x80, 0x80, 0x00, 0x02, /* 0x20 */ 35 0x12, 0xf5, 0x0c, 0xd0, 0x00, 0x00, 0x00, 0x7f, 36 0x00, 0xf0, 0x70, 0x30, 0x80, 0x80, 0x00, 0x02, /* 0x30 */ 37 0x12, 0xf5, 0x0c, 0xd0, 0x00, 0x00, 0x00, 0x7f, 38 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x40 */ 39 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, [all …]
|
/linux/arch/m68k/68000/ |
H A D | bootlogo.h | 7 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x01, 0x00, 0x00, 0x00, 8 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 9 0x00, 0x00, 0x40, 0x55, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 10 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 11 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 12 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xac, 0x00, 0x00, 0x00, 0x00, 0x00, 13 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 14 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 15 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 16 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, [all …]
|
/linux/drivers/net/ipa/reg/ |
H A D | gsi_reg-v3.5.1.c | 14 0x0000c020 + 0x1000 * GSI_EE_AP); 17 0x0000c024 + 0x1000 * GSI_EE_AP); 20 [CHTYPE_PROTOCOL] = GENMASK(2, 0), 32 0x0001c000 + 0x4000 * GSI_EE_AP, 0x80); 35 [CH_R_LENGTH] = GENMASK(15, 0), 40 0x0001c004 + 0x4000 * GSI_EE_AP, 0x80); 42 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80); 44 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80); 47 [WRR_WEIGHT] = GENMASK(3, 0), 54 REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80); [all …]
|
H A D | gsi_reg-v3.1.c | 14 0x0000c020 + 0x1000 * GSI_EE_AP); 17 0x0000c024 + 0x1000 * GSI_EE_AP); 20 [CHTYPE_PROTOCOL] = GENMASK(2, 0), 32 0x0001c000 + 0x4000 * GSI_EE_AP, 0x80); 35 [CH_R_LENGTH] = GENMASK(15, 0), 40 0x0001c004 + 0x4000 * GSI_EE_AP, 0x80); 42 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80); 44 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80); 47 [WRR_WEIGHT] = GENMASK(3, 0), 54 REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80); [all …]
|
H A D | gsi_reg-v5.0.c | 14 0x0000c01c + 0x1000 * GSI_EE_AP); 17 0x0000c028 + 0x1000 * GSI_EE_AP); 20 [CHTYPE_PROTOCOL] = GENMASK(6, 0), 29 0x00014000 + 0x12000 * GSI_EE_AP, 0x80); 32 [CH_R_LENGTH] = GENMASK(23, 0), 37 0x00014004 + 0x12000 * GSI_EE_AP, 0x80); 39 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x00014008 + 0x12000 * GSI_EE_AP, 0x80); 41 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001400c + 0x12000 * GSI_EE_AP, 0x80); 44 [WRR_WEIGHT] = GENMASK(3, 0), 56 REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x00014048 + 0x12000 * GSI_EE_AP, 0x80); [all …]
|
H A D | gsi_reg-v4.11.c | 14 0x0000c020 + 0x1000 * GSI_EE_AP); 17 0x0000c024 + 0x1000 * GSI_EE_AP); 20 [CHTYPE_PROTOCOL] = GENMASK(2, 0), 32 0x0000f000 + 0x4000 * GSI_EE_AP, 0x80); 35 [CH_R_LENGTH] = GENMASK(19, 0), 40 0x0000f004 + 0x4000 * GSI_EE_AP, 0x80); 42 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0000f008 + 0x4000 * GSI_EE_AP, 0x80); 44 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0000f00c + 0x4000 * GSI_EE_AP, 0x80); 47 [WRR_WEIGHT] = GENMASK(3, 0), 58 REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0000f05c + 0x4000 * GSI_EE_AP, 0x80); [all …]
|
H A D | gsi_reg-v4.9.c | 14 0x0000c020 + 0x1000 * GSI_EE_AP); 17 0x0000c024 + 0x1000 * GSI_EE_AP); 20 [CHTYPE_PROTOCOL] = GENMASK(2, 0), 32 0x0000f000 + 0x4000 * GSI_EE_AP, 0x80); 35 [CH_R_LENGTH] = GENMASK(19, 0), 40 0x0000f004 + 0x4000 * GSI_EE_AP, 0x80); 42 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0000f008 + 0x4000 * GSI_EE_AP, 0x80); 44 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0000f00c + 0x4000 * GSI_EE_AP, 0x80); 47 [WRR_WEIGHT] = GENMASK(3, 0), 58 REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0000f05c + 0x4000 * GSI_EE_AP, 0x80); [all …]
|
H A D | gsi_reg-v4.5.c | 14 0x0000c020 + 0x1000 * GSI_EE_AP); 17 0x0000c024 + 0x1000 * GSI_EE_AP); 20 [CHTYPE_PROTOCOL] = GENMASK(2, 0), 32 0x0000f000 + 0x4000 * GSI_EE_AP, 0x80); 35 [CH_R_LENGTH] = GENMASK(15, 0), 40 0x0000f004 + 0x4000 * GSI_EE_AP, 0x80); 42 REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0000f008 + 0x4000 * GSI_EE_AP, 0x80); 44 REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0000f00c + 0x4000 * GSI_EE_AP, 0x80); 47 [WRR_WEIGHT] = GENMASK(3, 0), 57 REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0000f05c + 0x4000 * GSI_EE_AP, 0x80); [all …]
|
/linux/Documentation/devicetree/bindings/dma/ |
H A D | mediatek,uart-dma.yaml | 92 reg = <0 0x11000400 0 0x80>, 93 <0 0x11000480 0 0x80>, 94 <0 0x11000500 0 0x80>, 95 <0 0x11000580 0 0x80>, 96 <0 0x11000600 0 0x80>, 97 <0 0x11000680 0 0x80>, 98 <0 0x11000700 0 0x80>, 99 <0 0x11000780 0 0x80>, 100 <0 0x11000800 0 0x80>, 101 <0 0x11000880 0 0x80>, [all …]
|
/linux/net/ncsi/ |
H A D | ncsi-pkt.h | 11 unsigned char revision; /* NCSI version - 0x01 */ 374 #define NCSI_PKT_REVISION 0x01 377 #define NCSI_PKT_CMD_CIS 0x00 /* Clear Initial State */ 378 #define NCSI_PKT_CMD_SP 0x01 /* Select Package */ 379 #define NCSI_PKT_CMD_DP 0x02 /* Deselect Package */ 380 #define NCSI_PKT_CMD_EC 0x03 /* Enable Channel */ 381 #define NCSI_PKT_CMD_DC 0x04 /* Disable Channel */ 382 #define NCSI_PKT_CMD_RC 0x05 /* Reset Channel */ 383 #define NCSI_PKT_CMD_ECNT 0x06 /* Enable Channel Network Tx */ 384 #define NCSI_PKT_CMD_DCNT 0x07 /* Disable Channel Network Tx */ [all …]
|
/linux/drivers/net/wan/ |
H A D | hd64572.h | 4 * CPU modes 0 & 2. 15 * PC300 initial CVS version (3.4.0-pre1) 25 #define ILAR 0x00 28 #define PABR0L 0x20 /* Physical Addr Boundary Register 0 L */ 29 #define PABR0H 0x21 /* Physical Addr Boundary Register 0 H */ 30 #define PABR1L 0x22 /* Physical Addr Boundary Register 1 L */ 31 #define PABR1H 0x23 /* Physical Addr Boundary Register 1 H */ 32 #define WCRL 0x24 /* Wait Control Register L */ 33 #define WCRM 0x25 /* Wait Control Register M */ 34 #define WCRH 0x26 /* Wait Control Register H */ [all …]
|