/freebsd/sys/contrib/device-tree/Bindings/sound/ |
H A D | amlogic,g12a-tohdmitx.yaml | 51 reg = <0x744 0x4>;
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H A D | amlogic,g12a-tohdmitx.txt | 15 reg = <0x0 0x744 0x0 0x4>; 30 dai-tdm-slot-tx-mask-0 = <1 1>; 32 codec-0 { 44 dai-tdm-slot-tx-mask-0 = <1 1>;
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx35-pinfunc.h | 13 #define MX35_PAD_CAPTURE__GPT_CAPIN1 0x004 0x328 0x000 0x0 0x0 14 #define MX35_PAD_CAPTURE__GPT_CMPOUT2 0x004 0x328 0x000 0x1 0x0 15 #define MX35_PAD_CAPTURE__CSPI2_SS1 0x004 0x328 0x7f4 0x2 0x0 16 #define MX35_PAD_CAPTURE__EPIT1_EPITO 0x004 0x328 0x000 0x3 0x0 17 #define MX35_PAD_CAPTURE__CCM_CLK32K 0x004 0x328 0x7d0 0x4 0x0 18 #define MX35_PAD_CAPTURE__GPIO1_4 0x004 0x328 0x850 0x5 0x0 19 #define MX35_PAD_COMPARE__GPT_CMPOUT1 0x008 0x32c 0x000 0x0 0x0 20 #define MX35_PAD_COMPARE__GPT_CAPIN2 0x008 0x32c 0x000 0x1 0x0 21 #define MX35_PAD_COMPARE__GPT_CMPOUT3 0x008 0x32c 0x000 0x2 0x0 22 #define MX35_PAD_COMPARE__EPIT2_EPITO 0x008 0x32c 0x000 0x3 0x0 [all …]
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H A D | imx6q-pinfunc.h | 13 #define MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x04c 0x360 0x000 0x0 0x0 14 #define MX6QDL_PAD_SD2_DAT1__ECSPI5_SS0 0x04c 0x360 0x834 0x1 0x0 15 #define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B 0x04c 0x360 0x000 0x2 0x0 16 #define MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x04c 0x360 0x7c8 0x3 0x0 17 #define MX6QDL_PAD_SD2_DAT1__KEY_COL7 0x04c 0x360 0x8f0 0x4 0x0 18 #define MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x04c 0x360 0x000 0x5 0x0 19 #define MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x050 0x364 0x000 0x0 0x0 20 #define MX6QDL_PAD_SD2_DAT2__ECSPI5_SS1 0x050 0x364 0x838 0x1 0x0 21 #define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B 0x050 0x364 0x000 0x2 0x0 22 #define MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x050 0x364 0x7b8 0x3 0x0 [all …]
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H A D | imx51-pinfunc.h | 13 #define MX51_PAD_EIM_D16__AUD4_RXFS 0x05c 0x3f0 0x000 0x5 0x0 14 #define MX51_PAD_EIM_D16__AUD5_TXD 0x05c 0x3f0 0x8d8 0x7 0x0 15 #define MX51_PAD_EIM_D16__EIM_D16 0x05c 0x3f0 0x000 0x0 0x0 16 #define MX51_PAD_EIM_D16__GPIO2_0 0x05c 0x3f0 0x000 0x1 0x0 17 #define MX51_PAD_EIM_D16__I2C1_SDA 0x05c 0x3f0 0x9b4 0x4 0x0 18 #define MX51_PAD_EIM_D16__UART2_CTS 0x05c 0x3f0 0x000 0x3 0x0 19 #define MX51_PAD_EIM_D16__USBH2_DATA0 0x05c 0x3f0 0x000 0x2 0x0 20 #define MX51_PAD_EIM_D17__AUD5_RXD 0x060 0x3f4 0x8d4 0x7 0x0 21 #define MX51_PAD_EIM_D17__EIM_D17 0x060 0x3f4 0x000 0x0 0x0 22 #define MX51_PAD_EIM_D17__GPIO2_1 0x060 0x3f4 0x000 0x1 0x0 [all …]
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H A D | imx6dl-pinfunc.h | 13 #define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0 14 #define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0 15 #define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0 16 #define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x04c 0x360 0x000 0x3 0x0 17 #define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x04c 0x360 0x8fc 0x3 0x0 18 #define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x04c 0x360 0x000 0x5 0x0 19 #define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x04c 0x360 0x000 0x7 0x0 20 #define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0 21 #define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS 0x050 0x364 0x000 0x1 0x0 22 #define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0 [all …]
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H A D | imx6sl-pinfunc.h | 13 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0 14 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0 15 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0 16 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0 17 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0 18 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0 19 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0 20 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0 21 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0 22 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0 [all …]
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H A D | imx50-pinfunc.h | 13 #define MX50_PAD_KEY_COL0__KPP_COL_0 0x020 0x2cc 0x000 0x0 0x0 14 #define MX50_PAD_KEY_COL0__GPIO4_0 0x020 0x2cc 0x000 0x1 0x0 15 #define MX50_PAD_KEY_COL0__EIM_NANDF_CLE 0x020 0x2cc 0x000 0x2 0x0 16 #define MX50_PAD_KEY_COL0__CTI_TRIGIN7 0x020 0x2cc 0x000 0x6 0x0 17 #define MX50_PAD_KEY_COL0__USBPHY1_TXREADY 0x020 0x2cc 0x000 0x7 0x0 18 #define MX50_PAD_KEY_ROW0__KPP_ROW_0 0x024 0x2d0 0x000 0x0 0x0 19 #define MX50_PAD_KEY_ROW0__GPIO4_1 0x024 0x2d0 0x000 0x1 0x0 20 #define MX50_PAD_KEY_ROW0__EIM_NANDF_ALE 0x024 0x2d0 0x000 0x2 0x0 21 #define MX50_PAD_KEY_ROW0__CTI_TRIGIN_ACK7 0x024 0x2d0 0x000 0x6 0x0 22 #define MX50_PAD_KEY_ROW0__USBPHY1_RXVALID 0x024 0x2d0 0x000 0x7 0x0 [all …]
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H A D | imx53-pinfunc.h | 13 #define MX53_PAD_GPIO_19__KPP_COL_5 0x020 0x348 0x840 0x0 0x0 14 #define MX53_PAD_GPIO_19__GPIO4_5 0x020 0x348 0x000 0x1 0x0 15 #define MX53_PAD_GPIO_19__CCM_CLKO 0x020 0x348 0x000 0x2 0x0 16 #define MX53_PAD_GPIO_19__SPDIF_OUT1 0x020 0x348 0x000 0x3 0x0 17 #define MX53_PAD_GPIO_19__RTC_CE_RTC_EXT_TRIG2 0x020 0x348 0x000 0x4 0x0 18 #define MX53_PAD_GPIO_19__ECSPI1_RDY 0x020 0x348 0x000 0x5 0x0 19 #define MX53_PAD_GPIO_19__FEC_TDATA_3 0x020 0x348 0x000 0x6 0x0 20 #define MX53_PAD_GPIO_19__SRC_INT_BOOT 0x020 0x348 0x000 0x7 0x0 21 #define MX53_PAD_KEY_COL0__KPP_COL_0 0x024 0x34c 0x000 0x0 0x0 22 #define MX53_PAD_KEY_COL0__GPIO4_6 0x024 0x34c 0x000 0x1 0x0 [all …]
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/freebsd/sys/dev/sound/pci/ |
H A D | cs4281.h | 32 #define CS4281_PCI_ID 0x60051013 39 #define CS4281PCI_HISR 0x000 40 # define CS4281PCI_HISR_DMAI 0x00040000 41 # define CS4281PCI_HISR_DMA(x) (0x0100 << (x)) 43 #define CS4281PCI_HICR 0x008 44 # define CS4281PCI_HICR_EOI 0x00000003 46 #define CS4281PCI_HIMR 0x00c 47 # define CS4281PCI_HIMR_DMAI 0x00040000 48 # define CS4281PCI_HIMR_DMA(x) (0x0100 << (x)) 50 #define CS4281PCI_IIER 0x010 [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/amlogic/ |
H A D | meson-g12.dtsi | 14 tdmif_a: audio-controller-0 { 16 #sound-dai-cells = <0>; 27 #sound-dai-cells = <0>; 38 #sound-dai-cells = <0>; 52 reg = <0x0 0x40000 0x0 0x34>; 53 #sound-dai-cells = <0>; 65 reg = <0x0 0x42000 0x0 0x2000>; 68 ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>; 70 clkc_audio: clock-controller@0 { 73 reg = <0x0 0x0 0x0 0xb4>; [all …]
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H A D | meson-sm1.dtsi | 16 tdmif_a: audio-controller-0 { 18 #sound-dai-cells = <0>; 29 #sound-dai-cells = <0>; 40 #sound-dai-cells = <0>; 50 #address-cells = <0x2>; 51 #size-cells = <0x0>; 53 cpu0: cpu@0 { 56 reg = <0x0 0x0>; 65 reg = <0x0 0x1>; 74 reg = <0x0 0x2>; [all …]
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/freebsd/sys/arm64/nvidia/tegra210/ |
H A D | tegra210_car.h | 39 #define RST_SOURCE 0x000 40 #define RST_DEVICES_L 0x004 41 #define RST_DEVICES_H 0x008 42 #define RST_DEVICES_U 0x00C 43 #define CLK_OUT_ENB_L 0x010 44 #define CLK_OUT_ENB_H 0x014 45 #define CLK_OUT_ENB_U 0x018 46 #define SUPER_CCLK_DIVIDER 0x024 47 #define SCLK_BURST_POLICY 0x028 48 #define SUPER_SCLK_DIVIDER 0x02c [all …]
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/freebsd/crypto/heimdal/lib/wind/ |
H A D | combining_table.c | 9 {0x300, 230}, /* Mn */ 10 {0x301, 230}, /* Mn */ 11 {0x302, 230}, /* Mn */ 12 {0x303, 230}, /* Mn */ 13 {0x304, 230}, /* Mn */ 14 {0x305, 230}, /* Mn */ 15 {0x306, 230}, /* Mn */ 16 {0x307, 230}, /* Mn */ 17 {0x308, 230}, /* Mn */ 18 {0x309, 230}, /* Mn */ [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 30 // Privilege Access: Read and Write = 0, 1, 2; Read-Only = 3. 31 // Privilege Mode: User = 0, System = 1 or Machine = 3. 37 // bits<6> Number = op{5 - 0}; 39 bit isRV32Only = 0; 78 def SysRegFFLAGS : SysReg<"fflags", 0x001>; 79 def SysRegFRM : SysReg<"frm", 0x002>; 80 def SysRegFCSR : SysReg<"fcsr", 0x003>; 85 def CYCLE : SysReg<"cycle", 0xC00>; 86 def TIME : SysReg<"time", 0xC01>; [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/westmereep-dp/ |
H A D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x63", 8 "UMask": "0x2" 12 "Counter": "0,1", 13 "EventCode": "0x63", 16 "UMask": "0x1" 20 "Counter": "0,1", 21 "EventCode": "0x51", 24 "UMask": "0x4" 28 "Counter": "0,1", [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/nehalemep/ |
H A D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x63", 8 "UMask": "0x2" 12 "Counter": "0,1", 13 "EventCode": "0x63", 16 "UMask": "0x1" 20 "Counter": "0,1", 21 "EventCode": "0x51", 24 "UMask": "0x4" 28 "Counter": "0,1", [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/westmereex/ |
H A D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x63", 8 "UMask": "0x2" 12 "Counter": "0,1", 13 "EventCode": "0x63", 16 "UMask": "0x1" 20 "Counter": "0,1", 21 "EventCode": "0x51", 24 "UMask": "0x4" 28 "Counter": "0,1", [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/nehalemex/ |
H A D | cache.json | 3 "EventCode": "0x63", 4 "Counter": "0,1", 5 "UMask": "0x2", 11 "EventCode": "0x63", 12 "Counter": "0,1", 13 "UMask": "0x1", 19 "EventCode": "0x51", 20 "Counter": "0,1", 21 "UMask": "0x4", 27 "EventCode": "0x51", [all …]
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/freebsd/contrib/ofed/opensm/opensm/ |
H A D | osm_torus.c | 64 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) 119 enum endpt_type { UNKNOWN = 0, SRCSINK, PASSTHRU }; 189 * used as follows, assuming 0 <= d < N: 195 * traversing a link from link.end[0] to link.end[1] is always in the positive 267 * A torus dimension has coordinate values 0, 1, ..., radix - 1. 270 * radix - 1 and 0. The following specify the dateline location 273 * E.g. if the shared switch is at 0,0,0, the following are all 316 #define X_MESH (1U << 0) 347 for (s = 0; s < f->switch_cnt; s++) { in teardown_fabric() 352 for (p = 0; p < sw->port_cnt; p++) { in teardown_fabric() [all …]
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/ |
H A D | osprey_reg_map.h | 86 volatile char pad__0[0x8]; /* 0x0 - 0x8 */ 87 volatile u_int32_t MAC_DMA_CR; /* 0x8 - 0xc */ 88 volatile char pad__1[0x8]; /* 0xc - 0x14 */ 89 volatile u_int32_t MAC_DMA_CFG; /* 0x14 - 0x18 */ 90 volatile u_int32_t MAC_DMA_RXBUFPTR_THRESH; /* 0x18 - 0x1c */ 91 volatile u_int32_t MAC_DMA_TXDPPTR_THRESH; /* 0x1c - 0x20 */ 92 volatile u_int32_t MAC_DMA_MIRT; /* 0x20 - 0x24 */ 93 volatile u_int32_t MAC_DMA_GLOBAL_IER; /* 0x24 - 0x28 */ 94 volatile u_int32_t MAC_DMA_TIMT; /* 0x28 - 0x2c */ 95 volatile u_int32_t MAC_DMA_RIMT; /* 0x2c - 0x30 */ [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/westmereep-sp/ |
H A D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x63", 8 "UMask": "0x2" 12 "Counter": "0,1", 13 "EventCode": "0x63", 16 "UMask": "0x1" 20 "Counter": "0,1", 21 "EventCode": "0x51", 24 "UMask": "0x4" 28 "Counter": "0,1", [all …]
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/freebsd/tools/tools/cxgbtool/ |
H A D | reg_defs_t3.c | 8 { "SG_CONTROL", 0x0, 0 }, 22 { "GlobalEnable", 0, 1 }, 23 { "SG_KDOORBELL", 0x4, 0 }, 25 { "EgrCntx", 0, 16 }, 26 { "SG_GTS", 0x8, 0 }, 29 { "NewIndex", 0, 16 }, 30 { "SG_CONTEXT_CMD", 0xc, 0 }, 38 { "Context", 0, 16 }, 39 { "SG_CONTEXT_DATA0", 0x10, 0 }, 40 { "SG_CONTEXT_DATA1", 0x14, 0 }, [all …]
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H A D | reg_defs_t3b.c | 7 { "SG_CONTROL", 0x0, 0 }, 26 { "GlobalEnable", 0, 1 }, 27 { "SG_KDOORBELL", 0x4, 0 }, 29 { "EgrCntx", 0, 16 }, 30 { "SG_GTS", 0x8, 0 }, 33 { "NewIndex", 0, 16 }, 34 { "SG_CONTEXT_CMD", 0xc, 0 }, 42 { "Context", 0, 16 }, 43 { "SG_CONTEXT_DATA0", 0x10, 0 }, 44 { "SG_CONTEXT_DATA1", 0x14, 0 }, [all …]
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H A D | reg_defs_t3c.c | 7 { "SG_CONTROL", 0x0, 0 }, 29 { "GlobalEnable", 0, 1 }, 30 { "SG_KDOORBELL", 0x4, 0 }, 32 { "EgrCntx", 0, 16 }, 33 { "SG_GTS", 0x8, 0 }, 36 { "NewIndex", 0, 16 }, 37 { "SG_CONTEXT_CMD", 0xc, 0 }, 45 { "Context", 0, 16 }, 46 { "SG_CONTEXT_DATA0", 0x10, 0 }, 47 { "SG_CONTEXT_DATA1", 0x14, 0 }, [all …]
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