Searched +full:0 +full:x702d0000 (Results 1 – 4 of 4) sorted by relevance
82 assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;98 reg = <0x702d0800 0x800>;105 ranges = <0x702d0000 0x702d0000 0x0000e400>;109 #size-cells = <0>;111 port@0 {112 reg = <0x0>;121 reg = <0xa>;130 reg = <0x702d0000 0x800>;154 #size-cells = <0>;156 admaif1_port: port@0 {[all …]
22 pattern: "^ahub@[0-9a-f]*$"69 '^port@[0-9]':74 '^i2s@[0-9a-f]+$':77 '^dmic@[0-9a-f]+$':81 '^admaif@[0-9a-f]+$':85 '^dspk@[0-9a-f]+$':89 '^mvc@[0-9a-f]+$':93 '^sfc@[0-9a-f]+$':97 '^amx@[0-9a-f]+$':101 '^adx@[0-9a-f]+$':[all …]
22 pattern: "^admaif@[0-9a-f]*$"52 '^port@[0-9]':87 pattern: "^[rt]x(1[0-9]|[1-9]|20)$"106 reg = <0x702d0000 0x800>;
33 #define CLK_SOURCE_CSITE 0x1d434 #define CLK_SOURCE_EMC 0x19c35 #define CLK_SOURCE_SOR1 0x41036 #define CLK_SOURCE_SOR0 0x41437 #define CLK_SOURCE_LA 0x1f838 #define CLK_SOURCE_SDMMC2 0x15439 #define CLK_SOURCE_SDMMC4 0x16440 #define CLK_SOURCE_EMC_DLL 0x66442 #define PLLC_BASE 0x8043 #define PLLC_OUT 0x84[all …]