Searched +full:0 +full:x7000f400 (Results 1 – 6 of 6) sorted by relevance
90 reg = <0x7000f000 0x400>;94 interrupts = <0 77 4>;103 reg = <0x7000f400 0x400>;104 interrupts = <0 78 4>;111 #interconnect-cells = <0>;116 reg = <0x6000c800 0x400>;117 interrupts = <0 45 4>;
6 - #size-cells : Should be 016 - #interconnect-cells : Should be 0.44 #size-cells = < 0 >;45 #interconnect-cells = <0>;47 reg = <0x7000f400 0x400>;48 interrupts = <0 78 0x04>;116 nvidia,emc-registers = < 0 0 0 0 0 0 0 0 0 0 0 0 0 0117 0 0 0 0 0 0 0 0 0 0 0 0 0 0118 0 0 0 0 0 0 0 0 0 0 0 0 0 0119 0 0 0 0 >;[all …]
38 const: 041 const: 0145 "^emc-table@[0-9]+$":165 const: 0172 "^emc-table@[0-9]+$":199 reg = <0x7000f400 0x400>;200 interrupts = <0 78 4>;207 #interconnect-cells = <0>;209 #size-cells = <0>;213 emc-tables@0 {[all …]
35 const: 053 "^emc-timings-[0-9]+$":62 "^timing-[0-9]+$":75 minimum: 091 Mode Register 0.98 minimum: 0239 reg = <0x7000f400 0x400>;240 interrupts = <0 78 4>;247 #interconnect-cells = <0>;255 nvidia,emc-auto-cal-interval = <0x001fffff>;[all …]
17 memory@0 {19 reg = <0 0>;24 reg = <0x40000000 0x40000>;27 ranges = <0 0x40000000 0x40000>;30 reg = <0x400 0x3fc0[all...]
20 reg = <0x80000000 0x0>;26 reg = <0x00003000 0x00000800>, /* PADS registers */27 <0x00003800 0x00000200>, /* AFI registers */28 <0x10000000 0x10000000>; /* configuration space */35 interrupt-map-mask = <0 0 [all...]