Searched +full:0 +full:x7000f000 (Results 1 – 6 of 6) sorted by relevance
15 - #iommu-cells: Should be 0. This cell represents the number of cells in an25 reg = <0x7000f000 0x400 /* controller registers */26 0x58000000 0x02000000>; /* GART aperture */29 interrupts = <GIC_SPI 77 0x04>;31 #iommu-cells = <0>;
48 const: 069 reg = <0x7000f000 0x400>, /* Controller registers */70 <0x58000000 0x02000000>; /* GART aperture */74 interrupts = <0 77 4>;76 #iommu-cells = <0>;
64 "^emc-timings-[0-9]+$":73 "^timing-[0-9]+$":134 reg = <0x7000f000 0x400>;138 interrupts = <0 77 4>;151 0x0000000a /* MC_EMEM_ARB_CFG */152 0xc0000079 /* MC_EMEM_ARB_OUTSTANDING_REQ */153 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */154 0x00000004 /* MC_EMEM_ARB_TIMING_RP */155 0x00000010 /* MC_EMEM_ARB_TIMING_RC */156 0x0000000b /* MC_EMEM_ARB_TIMING_RAS */[all …]
90 reg = <0x7000f000 0x400>;94 interrupts = <0 77 4>;103 reg = <0x7000f400 0x400>;104 interrupts = <0 78 4>;111 #interconnect-cells = <0>;116 reg = <0x6000c800 0x400>;117 interrupts = <0 45 4>;
17 memory@0 {19 reg = <0 0>;24 reg = <0x40000000 0x40000>;27 ranges = <0 0x40000000 0x40000>;30 reg = <0x400 0x3fc0[all...]
20 reg = <0x80000000 0x0>;26 reg = <0x00003000 0x00000800>, /* PADS registers */27 <0x00003800 0x00000200>, /* AFI registers */28 <0x10000000 0x10000000>; /* configuration space */35 interrupt-map-mask = <0 0 [all...]