/linux/arch/m68k/include/asm/ |
H A D | sun3x.h | 6 #define SUN3X_IOMMU 0x60000000 7 #define SUN3X_ENAREG 0x61000000 8 #define SUN3X_INTREG 0x61001400 9 #define SUN3X_DIAGREG 0x61001800 10 #define SUN3X_ZS1 0x62000000 11 #define SUN3X_ZS2 0x62002000 12 #define SUN3X_LANCE 0x65002000 13 #define SUN3X_EEPROM 0x64000000 14 #define SUN3X_IDPROM 0x640007d8 15 #define SUN3X_VIDEO_BASE 0x50000000 [all …]
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H A D | sun3xprom.h | 18 #define SUN3X_IOMMU 0x60000000 19 #define SUN3X_ENAREG 0x61000000 20 #define SUN3X_INTREG 0x61001400 21 #define SUN3X_DIAGREG 0x61001800 22 #define SUN3X_ZS1 0x62000000 23 #define SUN3X_ZS2 0x62002000 24 #define SUN3X_LANCE 0x65002000 25 #define SUN3X_EEPROM 0x64000000 26 #define SUN3X_IDPROM 0x640007d8 27 #define SUN3X_VIDEO_BASE 0x50400000 [all …]
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/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | st,stm32-fmc2-ebi.yaml | 51 <bank-number> 0 <address of the bank> <size> 58 "^.*@[0-4],[a-f0-9]+$": 82 reg = <0x58002000 0x1000>; 86 ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ 87 <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ 88 <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ 89 <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ 90 <4 0 0x80000000 0x10000000>; /* NAND */ 92 psram@0,0 { 94 reg = <0 0x00000000 0x100000>; [all …]
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/linux/arch/powerpc/boot/dts/ |
H A D | a4m072.dts | 27 ranges = <0 0xf0000000 0x0000c000>; 28 reg = <0xf0000000 0x00000100>; 29 bus-frequency = <0>; /* From boot loader */ 30 system-frequency = <0>; /* From boot loader */ 33 fsl,init-ext-48mhz-en = <0x0>; 34 fsl,init-fd-enable = <0x01>; 35 fsl,init-fd-counters = <0x3333>; 44 reg = <0x2000 0x100>; 45 interrupts = <2 1 0>; 50 reg = <0x2200 0x100>; [all …]
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/linux/drivers/video/fbdev/via/ |
H A D | accel.c | 19 gemode = readl(engine + VIA_REG_GEMODE) & 0xfffffcfc; in viafb_set_bpp() 35 return 0; in viafb_set_bpp() 44 u32 ge_cmd = 0, tmp, i; in hw_bitblt_1() 54 ge_cmd |= 0x00008000; in hw_bitblt_1() 59 ge_cmd |= 0x00004000; in hw_bitblt_1() 67 case 0x00: /* blackness */ in hw_bitblt_1() 68 case 0x5A: /* pattern inversion */ in hw_bitblt_1() 69 case 0xF0: /* pattern copy */ in hw_bitblt_1() 70 case 0xFF: /* whiteness */ in hw_bitblt_1() 84 if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000) in hw_bitblt_1() [all …]
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/linux/crypto/ |
H A D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6, 68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591, 69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56, 70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec, 71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa, 72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb, 73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45, 74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b, 75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c, 76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83, [all …]
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/linux/drivers/gpu/drm/amd/display/dmub/src/ |
H A D | dmub_srv.c | 71 #define DMUB_CW0_BASE (0x60000000) 72 #define DMUB_CW1_BASE (0x61000000) 73 #define DMUB_CW3_BASE (0x63000000) 74 #define DMUB_CW4_BASE (0x64000000) 75 #define DMUB_CW5_BASE (0x65000000) 76 #define DMUB_CW6_BASE (0x66000000) 78 #define DMUB_REGION5_BASE (0xA0000000) 79 #define DMUB_REGION6_BASE (0xC0000000) 101 for (pos = 0; pos < end; pos += sizeof(buf)) in dmub_flush_buffer_mem() 143 for (i = 0; i < 16; ++i) { in dmub_get_fw_meta_info() [all …]
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/linux/drivers/net/wireless/ath/ath9k/ |
H A D | ar5008_phy.c | 31 #define AR5008_11NA_OFDM_SHIFT 0 55 {0x000098b0, 0x1e5795e5}, 56 {0x000098e0, 0x02008020}, 61 {0x000098b0, 0x02108421}, 62 {0x000098ec, 0x00000008}, 67 {0x000098b0, 0x0e73ff17}, 68 {0x000098e0, 0x00000420}, 73 {0x000098f0, 0x01400018, 0x01c00018}, 78 {0x0000989c, 0x00000500}, 79 {0x0000989c, 0x00000800}, [all …]
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H A D | ar9003_phy.c | 27 #define AR9300_11NA_OFDM_SHIFT 0 38 /* level: 0 1 2 3 4 5 6 7 8 */ 39 { -4, -2, 0, 2, 4, 6, 8, 10, 12 }; /* lvl 0-8, default 2 */ 42 /* level: 0 1 2 3 4 5 6 7 8 */ 43 { -6, -4, -2, 0, 2, 4, 6, 8 }; /* lvl 0-7, default 3 */ 138 * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17) 142 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10) 146 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17) 151 u16 bMode, fracMode = 0, aModeRefSel = 0; in ar9003_hw_set_channel() 152 u32 freq, chan_frac, div, channelSel = 0, reg32 = 0; in ar9003_hw_set_channel() [all …]
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/linux/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x_hsi.h | 17 #define FW_ENCODE_32BIT_PATTERN 0x1e1e1e1e 23 #define BNX2X_MAX_ISCSI_TRGT_CONN_MASK 0xFFFF 24 #define BNX2X_MAX_ISCSI_TRGT_CONN_SHIFT 0 25 #define BNX2X_MAX_ISCSI_INIT_CONN_MASK 0xFFFF0000 31 #define BNX2X_MAX_FCOE_TRGT_CONN_MASK 0xFFFF 32 #define BNX2X_MAX_FCOE_TRGT_CONN_SHIFT 0 33 #define BNX2X_MAX_FCOE_INIT_CONN_MASK 0xFFFF0000 42 #define PIN_CFG_NA 0x00000000 43 #define PIN_CFG_GPIO0_P0 0x00000001 44 #define PIN_CFG_GPIO1_P0 0x00000002 [all …]
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/linux/drivers/net/wireless/realtek/rtw88/ |
H A D | rtw8822c_table.c | 16 0x83000000, 0x00000000, 0x40000000, 0x00000000, 17 0x1D90, 0x300001FF, 18 0x1D90, 0x300101FE, 19 0x1D90, 0x300201FD, 20 0x1D90, 0x300301FC, 21 0x1D90, 0x300401FB, 22 0x1D90, 0x300501FA, 23 0x1D90, 0x300601F9, 24 0x1D90, 0x300701F8, 25 0x1D90, 0x300801F7, [all …]
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