/freebsd/sys/arm/freescale/imx/ |
H A D | imx_machdep.h | 52 #define IMXSOC_51 0x51000000 53 #define IMXSOC_53 0x53000000 54 #define IMXSOC_6SL 0x60000000 55 #define IMXSOC_6DL 0x61000000 56 #define IMXSOC_6S 0x62000000 57 #define IMXSOC_6Q 0x63000000 58 #define IMXSOC_6UL 0x64000000
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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | st,stm32-fmc2-ebi.yaml | 51 <bank-number> 0 <address of the bank> <size> 58 "^.*@[0-4],[a-f0-9]+$": 82 reg = <0x58002000 0x1000>; 86 ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ 87 <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ 88 <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ 89 <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ 90 <4 0 0x80000000 0x10000000>; /* NAND */ 92 psram@0,0 { 94 reg = <0 0x00000000 0x100000>; [all …]
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/freebsd/sys/contrib/device-tree/src/powerpc/ |
H A D | a4m072.dts | 27 ranges = <0 0xf0000000 0x0000c000>; 28 reg = <0xf0000000 0x00000100>; 29 bus-frequency = <0>; /* From boot loader */ 30 system-frequency = <0>; /* From boot loader */ 33 fsl,init-ext-48mhz-en = <0x0>; 34 fsl,init-fd-enable = <0x01>; 35 fsl,init-fd-counters = <0x3333>; 44 reg = <0x2000 0x100>; 45 interrupts = <2 1 0>; 50 reg = <0x2200 0x100>; [all …]
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/freebsd/contrib/llvm-project/compiler-rt/lib/xray/ |
H A D | xray_mips64.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 23 PO_DADDIU = 0x64000000, // daddiu rt, rs, imm 24 PO_SD = 0xFC000000, // sd rt, base(offset) 25 PO_LUI = 0x3C000000, // lui rt, imm 26 PO_ORI = 0x34000000, // ori rt, rs, imm 27 PO_DSLL = 0x00000038, // dsll rd, rt, sa 28 PO_JALR = 0x00000009, // jalr rs 29 PO_LD = 0xDC000000, // ld rt, base(offset) 30 PO_B60 = 0x1000000f, // b #60 31 PO_NOP = 0x0, // nop [all …]
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/LoongArch/ |
H A D | EmulateInstructionLoongArch.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 39 {0xfc000000, 0x40000000, &EmulateInstructionLoongArch::EmulateBEQZ, in GetOpcodeForInstruction() 41 {0xfc000000, 0x44000000, &EmulateInstructionLoongArch::EmulateBNEZ, in GetOpcodeForInstruction() 43 {0xfc000300, 0x48000000, &EmulateInstructionLoongArch::EmulateBCEQZ, in GetOpcodeForInstruction() 45 {0xfc000300, 0x48000100, &EmulateInstructionLoongArch::EmulateBCNEZ, in GetOpcodeForInstruction() 47 {0xfc000000, 0x4c000000, &EmulateInstructionLoongArch::EmulateJIRL, in GetOpcodeForInstruction() 49 {0xfc000000, 0x50000000, &EmulateInstructionLoongArch::EmulateB, in GetOpcodeForInstruction() 51 {0xfc000000, 0x54000000, &EmulateInstructionLoongArch::EmulateBL, in GetOpcodeForInstruction() 53 {0xfc000000, 0x58000000, &EmulateInstructionLoongArch::EmulateBEQ, in GetOpcodeForInstruction() 55 {0xfc000000, 0x5c000000, &EmulateInstructionLoongArch::EmulateBNE, in GetOpcodeForInstruction() [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/broadcom/northstar2/ |
H A D | ns2.dtsi | 33 /memreserve/ 0x81000000 0x00200000; 46 #size-cells = <0>; 48 A57_0: cpu@0 { 51 reg = <0 0>; 59 reg = <0 1>; 67 reg = <0 2>; 75 reg = <0 3>; 80 CLUSTER0_L2: l2-cache@0 { 94 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0xff) | 96 <GIC_PPI 14 (GIC_CPU_MASK_RAW(0xff) | [all …]
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/freebsd/sys/contrib/openzfs/module/icp/asm-x86_64/aes/ |
H A D | aestab2.h | 49 0x00000001, 0x00000002, 0x00000004, 0x00000008, 50 0x00000010, 0x00000020, 0x00000040, 0x00000080, 51 0x0000001b, 0x00000036 57 0x00000063, 0x0000007c, 0x00000077, 0x0000007b, 58 0x000000f2, 0x0000006b, 0x0000006f, 0x000000c5, 59 0x00000030, 0x00000001, 0x00000067, 0x0000002b, 60 0x000000fe, 0x000000d7, 0x000000ab, 0x00000076, 61 0x000000ca, 0x00000082, 0x000000c9, 0x0000007d, 62 0x000000fa, 0x00000059, 0x00000047, 0x000000f0, 63 0x000000ad, 0x000000d4, 0x000000a2, 0x000000af, [all …]
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/freebsd/sys/powerpc/powerpc/ |
H A D | db_disasm.c | 17 Op_A = 0x00000001, 18 Op_B = 0x00000002, 19 Op_BI = 0x00000004, 20 Op_BO = 0x00000008, 22 Op_CRM = 0x00000010, 23 Op_D = 0x00000020, 24 Op_ST = 0x00000020, /* Op_S for store-operations, same as D */ 25 Op_S = 0x00000040, /* S-field is swapped with A-field */ 27 Op_dA = 0x00000080, 28 Op_LK = 0x00000100, [all …]
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/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | stm32mp131.dtsi | 16 #size-cells = <0>; 18 cpu0: cpu@0 { 21 reg = <0>; 43 #size-cells = <0>; 44 linaro,optee-channel-id = <0>; 47 reg = <0x14>; 52 reg = <0x16>; 57 reg = <0x17>; 61 #size-cells = <0>; 63 scmi_reg11: regulator@0 { [all …]
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H A D | stm32mp151.dtsi | 16 #size-cells = <0>; 18 cpu0: cpu@0 { 22 reg = <0>; 42 reg = <0xa0021000 0x1000>, 43 <0xa0022000 0x2000>; 58 #clock-cells = <0>; 64 #clock-cells = <0>; 70 #clock-cells = <0>; 76 #clock-cells = <0>; 82 #clock-cells = <0>; [all …]
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/freebsd/tests/sys/cddl/zfs/tests/txg_integrity/ |
H A D | txg_integrity.c | 84 #define USE_MMAP 0 90 //partitions[-1] is understood to be 0 and partitions[NUM_CHUNKS] must be 1.0 94 //8 / (NUM_CHUNKS * CLUSTERSIZE) = 1 / 524288 = 0x0.00002 98 //chunk 0 corresponds to bit 1, chunk 1 to bit 2, etc 106 if (chunk == 0){ in get_chunk_range() 107 *begin = 0; in get_chunk_range() 117 leader_syncs = 0, 125 {0x2000000, 0x4000000, 0x6000000, 0x8000000, 0xa000000, 0xc000000, 0xe000000, 0x10000000, 126 0x12000000, 0x14000000, 0x16000000, 0x18000000, 0x1a000000, 0x1c000000, 0x1e000000, 0x20000000, 127 0x22000000, 0x24000000, 0x26000000, 0x28000000, 0x2a000000, 0x2c000000, 0x2e000000, 0x30000000, [all …]
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H A D | fsync_integrity.c | 61 * Every even-numbered thread, starting with the first (0th), will fsync() 98 //partitions[-1] is understood to be 0 and partitions[NUM_CHUNKS] must be 1.0 102 //8 / (NUM_CHUNKS * CLUSTERSIZE) = 1 / 524288 = 0x0.00002 116 if (chunk == 0){ in get_chunk_range() 117 *begin = 0; in get_chunk_range() 129 {0x2000000, 0x4000000, 0x6000000, 0x8000000, 0xa000000, 0xc000000, 0xe000000, 0x10000000, 130 0x12000000, 0x14000000, 0x16000000, 0x18000000, 0x1a000000, 0x1c000000, 0x1e000000, 0x20000000, 131 0x22000000, 0x24000000, 0x26000000, 0x28000000, 0x2a000000, 0x2c000000, 0x2e000000, 0x30000000, 132 0x32000000, 0x34000000, 0x36000000, 0x38000000, 0x3a000000, 0x3c000000, 0x3e000000, 0x40000000, 133 0x42000000, 0x44000000, 0x46000000, 0x48000000, 0x4a000000, 0x4c000000, 0x4e000000, 0x50000000, [all …]
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/freebsd/sys/dev/ath/ath_hal/ar5416/ |
H A D | ar5416_reset.c | 49 #if 0 82 #define N(a) (sizeof (a) / sizeof (a[0])) in ar5416Reset() 83 #define FAIL(_code) do { ecode = _code; goto bad; } while (0) in ar5416Reset() 93 uint64_t tsf = 0; in ar5416Reset() 135 if (rssiThrReg == 0) in ar5416Reset() 155 if ((! AR_SREV_KITE(ah)) && saveDefAntenna == 0) /* XXX magic constants */ in ar5416Reset() 224 HALDEBUG(ah, HAL_DEBUG_RESET, ">>>2 %s: AR_PHY_DAG_CTRLCCK=0x%x\n", in ar5416Reset() 226 HALDEBUG(ah, HAL_DEBUG_RESET, ">>>2 %s: AR_PHY_ADC_CTL=0x%x\n", in ar5416Reset() 309 (ahp->ah_assocId & 0x3fff) << AR_BSS_ID1_AID_S); in ar5416Reset() 314 OS_REG_WRITE(ah, AR_ISR, ~0); /* cleared on write */ in ar5416Reset() [all …]
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/freebsd/sys/dev/ath/ath_hal/ar5212/ |
H A D | ar5212_reset.c | 82 for (r = 0; r < ia->rows; r++) { in write_common() 83 uint32_t reg = V(r, 0); in write_common() 123 #define N(a) (sizeof (a) / sizeof (a[0])) in ar5212Reset() 124 #define FAIL(_code) do { ecode = _code; goto bad; } while (0) in ar5212Reset() 132 int16_t cckOfdmPwrDelta = 0; in ar5212Reset() 199 saveFrameSeqCount = 0; /* NB: silence compiler */ in ar5212Reset() 204 #if 0 in ar5212Reset() 238 if (saveDefAntenna == 0) /* XXX magic constants */ in ar5212Reset() 276 "%s: invalid channel %u/0x%x\n", in ar5212Reset() 288 "%s: invalid channel %u/0x%x\n", in ar5212Reset() [all …]
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/freebsd/sys/dev/msk/ |
H A D | if_mskreg.h | 102 #define VENDORID_SK 0x1148 107 #define VENDORID_MARVELL 0x11AB 112 #define VENDORID_DLINK 0x1186 117 #define DEVICEID_SK_YUKON2 0x9000 118 #define DEVICEID_SK_YUKON2_EXPR 0x9e00 123 #define DEVICEID_MRVL_8021CU 0x4340 124 #define DEVICEID_MRVL_8022CU 0x4341 125 #define DEVICEID_MRVL_8061CU 0x4342 126 #define DEVICEID_MRVL_8062CU 0x4343 127 #define DEVICEID_MRVL_8021X 0x4344 [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchInstrInfo.td | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 18 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>, 20 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>, 24 def SDT_LoongArchCall : SDTypeProfile<0, -1, [SDTCisVT<0, GRLenVT>]>; 26 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisVT<0, i64> 30 SDTCisInt<0>, SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<3>, 35 SDTCisInt<0>, SDTCisSameAs<0, 1>, SDTCisInt<2>, SDTCisSameAs<2, 3> 39 def SDT_LoongArchVI : SDTypeProfile<0, 1, [SDTCisVT<0, GRLenVT>]>; 41 def SDT_LoongArchCsrrd : SDTypeProfile<1, 1, [SDTCisInt<0>, 43 def SDT_LoongArchCsrwr : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisSameAs<0, 1>, [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sm8250.dtsi | 80 #clock-cells = <0>; 88 #clock-cells = <0>; 94 #size-cells = <0>; 96 CPU0: cpu@0 { 99 reg = <0x0 0x0>; 100 clocks = <&cpufreq_hw 0>; 107 qcom,freq-domain = <&cpufreq_hw 0>; 109 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 115 cache-size = <0x20000>; 121 cache-size = <0x400000>; [all …]
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/freebsd/sys/dev/ti/ |
H A D | ti_fw.h | 5 static int tigonFwReleaseMajor = 0xc; 6 static int tigonFwReleaseMinor = 0x4; 7 static int tigonFwReleaseFix = 0xb; 8 static u_int32_t tigonFwStartAddr = 0x00004000; 9 static u_int32_t tigonFwTextAddr = 0x00004000; 10 static int tigonFwTextLen = 0x11140; 11 static u_int32_t tigonFwRodataAddr = 0x00015140; 12 static int tigonFwRodataLen = 0xac0; 13 static u_int32_t tigonFwDataAddr = 0x00015c20; 14 static int tigonFwDataLen = 0x170; [all …]
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/freebsd/sys/dev/bxe/ |
H A D | ecore_hsi.h | 33 #define FW_ENCODE_32BIT_PATTERN 0x1e1e1e1e 39 #define LICENSE_MAX_ISCSI_TRGT_CONN_MASK 0xFFFF 40 #define LICENSE_MAX_ISCSI_TRGT_CONN_SHIFT 0 41 #define LICENSE_MAX_ISCSI_INIT_CONN_MASK 0xFFFF0000 47 #define LICENSE_MAX_FCOE_TRGT_CONN_MASK 0xFFFF 48 #define LICENSE_MAX_FCOE_TRGT_CONN_SHIFT 0 49 #define LICENSE_MAX_FCOE_INIT_CONN_MASK 0xFFFF0000 61 #define PIN_CFG_NA 0x00000000 62 #define PIN_CFG_GPIO0_P0 0x00000001 63 #define PIN_CFG_GPIO1_P0 0x00000002 [all …]
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/freebsd/tools/test/iconv/ref/ |
H A D | UTF-32BE-rev | 1 0x00 = 0x00000000 2 0x01 = 0x01000000 3 0x02 = 0x02000000 4 0x03 = 0x03000000 5 0x04 = 0x04000000 6 0x05 = 0x05000000 7 0x06 = 0x06000000 8 0x07 = 0x07000000 9 0x08 = 0x08000000 10 0x09 = 0x09000000 [all …]
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/freebsd/sys/dev/ispfw/ |
H A D | asm_2700.h | 38 0x0501f06c, 0x00122000, 0x00100000, 0x00014f80, 39 0x00000009, 0x0000000c, 0x00000000, 0x785ad0d5, 40 0x00000040, 0x0000f206, 0x20434f50, 0x59524947, 41 0x48542032, 0x30323220, 0x514c4f47, 0x49432043, 42 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 43 0x32377878, 0x20466972, 0x6d776172, 0x65202020, 44 0x56657273, 0x696f6e20, 0x2020392e, 0x31322e30, 45 0x30202024, 0x00000000, 0x0000002f, 0x00000000, 46 0x00000000, 0x00000000, 0x00000000, 0x00100000, 47 0x00100000, 0x00014f80, 0xffffffff, 0x00122004, [all …]
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/freebsd/sys/contrib/dev/rtw88/ |
H A D | rtw8822c_table.c | 16 0x83000000, 0x00000000, 0x40000000, 0x00000000, 17 0x1D90, 0x300001FF, 18 0x1D90, 0x300101FE, 19 0x1D90, 0x300201F [all...] |