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/linux/Documentation/devicetree/bindings/access-controllers/
H A Daccess-controllers.yaml66 reg = <0x50000 0x400>;
71 reg = <0x60000 0x10000>;
78 reg = <0x60100 0x400>;
/linux/drivers/gpu/drm/i915/display/
H A Dintel_fdi_regs.h11 #define FDI_PLL_BIOS_0 _MMIO(0x46000)
12 #define FDI_PLL_FB_CLOCK_MASK 0xff
13 #define FDI_PLL_BIOS_1 _MMIO(0x46004)
14 #define FDI_PLL_BIOS_2 _MMIO(0x46008)
15 #define DISPLAY_PORT_PLL_BIOS_0 _MMIO(0x4600c)
16 #define DISPLAY_PORT_PLL_BIOS_1 _MMIO(0x46010)
17 #define DISPLAY_PORT_PLL_BIOS_2 _MMIO(0x46014)
19 #define FDI_PLL_FREQ_CTL _MMIO(0x46030)
21 #define FDI_PLL_FREQ_LOCK_LIMIT_MASK 0xfff00
22 #define FDI_PLL_FREQ_DISABLE_COUNT_LIMIT_MASK 0xff
[all …]
/linux/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Dmme0_ctrl_regs.h22 #define mmMME0_CTRL_ARCH_STATUS 0x60000
24 #define mmMME0_CTRL_ARCH_BASE_ADDR_HIGH_S 0x60008
26 #define mmMME0_CTRL_ARCH_BASE_ADDR_HIGH_L 0x6000C
28 #define mmMME0_CTRL_ARCH_BASE_ADDR_HIGH_O 0x60010
30 #define mmMME0_CTRL_ARCH_BASE_ADDR_LOW_S 0x60014
32 #define mmMME0_CTRL_ARCH_BASE_ADDR_LOW_L 0x60018
34 #define mmMME0_CTRL_ARCH_BASE_ADDR_LOW_O 0x6001C
36 #define mmMME0_CTRL_ARCH_HEADER_LOW 0x60020
38 #define mmMME0_CTRL_ARCH_HEADER_HIGH 0x60024
40 #define mmMME0_CTRL_ARCH_CONV_KERNEL_SIZE_MINUS_1 0x60028
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1012a.dtsi32 #size-cells = <0>;
34 cpu0: cpu@0 {
37 reg = <0x0>;
38 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
54 arm,psci-suspend-param = <0x0>;
63 #clock-cells = <0>;
70 #clock-cells = <0>;
92 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
93 <0x0 0x1402000 0 0x2000>, /* GICC */
94 <0x0 0x1404000 0 0x2000>, /* GICH */
[all …]
/linux/drivers/edac/
H A Dthunderx_edac.c48 int ret = 0; in decode_register()
68 #define L2C_CTL 0x87E080800000
69 #define L2C_CTL_DISIDXALIAS BIT(0)
71 #define PCI_DEVICE_ID_THUNDER_LMC 0xa022
73 #define LMC_FADR 0x20
74 #define LMC_FADR_FDIMM(x) ((x >> 37) & 0x1)
75 #define LMC_FADR_FBUNK(x) ((x >> 36) & 0x1)
76 #define LMC_FADR_FBANK(x) ((x >> 32) & 0xf)
77 #define LMC_FADR_FROW(x) ((x >> 14) & 0xffff)
78 #define LMC_FADR_FCOL(x) ((x >> 0) & 0x1fff)
[all …]
/linux/drivers/gpu/drm/i915/
H A Di915_reg.h106 * #define _FOO_A 0xf000
107 * #define _FOO_B 0xf001
111 * #define FOO_MODE_BAR REG_FIELD_PREP(FOO_MODE_MASK, 0)
115 * #define BAR _MMIO(0xb000)
116 * #define GEN8_BAR _MMIO(0xb888)
119 #define GU_CNTL_PROTECTED _MMIO(0x10100C)
122 #define GU_CNTL _MMIO(0x101010)
125 #define GU_DEBUG _MMIO(0x101018)
128 #define GEN6_STOLEN_RESERVED _MMIO(0x1082C0)
129 #define GEN6_STOLEN_RESERVED_ADDR_MASK (0xFFF << 20)
[all …]
/linux/fs/unicode/
H A Dutf8data.c_shipped8 0,
9 0x10100,
10 0x20000,
11 0x20100,
12 0x30000,
13 0x30100,
14 0x30200,
15 0x40000,
16 0x40100,
17 0x50000,
[all …]
/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852c_table.c10 {0xF0FF0000, 0x00000000},
11 {0xF03300FF, 0x00000001},
12 {0xF03400FF, 0x00000002},
13 {0xF03500FF, 0x00000003},
14 {0xF03600FF, 0x00000004},
15 {0x70C, 0x00000020},
16 {0x704, 0x601E0100},
17 {0x4000, 0x00000000},
18 {0x4004, 0xCA014000},
19 {0x4008, 0xC751D4F0},
[all …]