Home
last modified time | relevance | path

Searched +full:0 +full:x600000 (Results 1 – 25 of 123) sorted by relevance

12345

/linux/drivers/virt/nitro_enclaves/
H A Dne_misc_dev_test.c6 #define INVALID_VALUE (~0ull)
17 * Add the region from 0x1000 to (0x1000 + 0x200000 - 1):
22 * num = 0
25 {0x1000, 0x200000, -EINVAL, 0, INVALID_VALUE, INVALID_VALUE},
28 * Add the region from 0x200000 to (0x200000 + 0x1000 - 1):
33 * num = 0
36 {0x200000, 0x1000, -EINVAL, 0, INVALID_VALUE, INVALID_VALUE},
39 * Add the region from 0x200000 to (0x200000 + 0x200000 - 1):
46 * {start=0x200000, end=0x3fffff}, // len=0x200000
49 {0x200000, 0x200000, 0, 1, 0x200000, 0x200000},
[all …]
/linux/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Dtpc0_cfg_masks.h23 #define TPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_LOW_V_SHIFT 0
24 #define TPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_LOW_V_MASK 0xFFFFFFFF
27 #define TPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_HIGH_V_SHIFT 0
28 #define TPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_HIGH_V_MASK 0xFFFFFFFF
31 #define TPC0_CFG_KERNEL_TENSOR_0_PADDING_VALUE_V_SHIFT 0
32 #define TPC0_CFG_KERNEL_TENSOR_0_PADDING_VALUE_V_MASK 0xFFFFFFFF
35 #define TPC0_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG_DATA_TYPE_SHIFT 0
36 #define TPC0_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG_DATA_TYPE_MASK 0x7
38 #define TPC0_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG_VALID_DIM_MASK_MASK 0x1F00
40 #define TPC0_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG_LAST_DIM_MASK 0x70000
[all …]
/linux/include/linux/
H A Ddio.h19 * range from 0-63 (DIO) and 132-255 (DIO-II).
21 * 0x600000 + sc * 0x10000
22 * So DIO cards cover [0x600000-0x800000); the areas [0x200000-0x400000) and
23 * [0x800000-0x1000000) are for additional space required by things
24 * like framebuffers. [0x400000-0x600000) is for miscellaneous internal I/O.
26 * at 0xf0000000 on bootup.
27 * DIO-II boards are at 0x1000000 + (sc - 132) * 0x400000
28 * which is address range [0x1000000-0x20000000) -- too big to map completely,
101 #define DIO_IDOFF 0x01 /* primary device ID */
102 #define DIO_IPLOFF 0x03 /* interrupt priority level */
[all …]
/linux/drivers/video/fbdev/
H A Dcontrolfb.c63 #define in_8(addr) 0
65 #define in_le32(addr) 0
100 for (i = 0; i < 3; i++) in PAR_EQUAL()
103 return 0; in PAR_EQUAL()
104 for (i = 0; i < 16; i++) in PAR_EQUAL()
107 return 0; in PAR_EQUAL()
179 return 0; in controlfb_setcolreg()
193 for (i = 0; i < 3; ++i) { in set_control_clock()
195 0x50, i + 1, params[i]); in set_control_clock()
245 out_le32(CNTRL_REG(p,ctrl), 0x400 | par->ctrl); in control_set_hardware()
[all …]
/linux/drivers/staging/rtl8712/
H A Drtl8712_ratectrl_bitdef.h11 #define _INIRTSMCS_SEL_MSK 0x3F
15 #define _RRSR_RSC_MSK 0x600000
17 #define _RRSR_BITMAP_MSK 0x0FFFFF
18 #define _RRSR_BITMAP_SHT 0
21 #define _AGGLMT_MCS32_MSK 0xF0
23 #define _AGGLMT_MCS15_SGI_MSK 0x0F
24 #define _AGGLMT_MCS15_SGI_SHT 0
30 #define _CCK_MSK 0xFF00
32 #define _BARKER_MSK 0x00FF
33 #define _BARKER_SHT 0
/linux/arch/mips/include/asm/sn/sn0/
H A Dhubni.h24 #define NI_BASE 0x600000
25 #define NI_BASE_TABLES 0x630000
27 #define NI_STATUS_REV_ID 0x600000 /* Hub network status, rev, and ID */
28 #define NI_PORT_RESET 0x600008 /* Reset the network interface */
29 #define NI_PROTECTION 0x600010 /* NI register access permissions */
30 #define NI_GLOBAL_PARMS 0x600018 /* LLP parameters */
31 #define NI_SCRATCH_REG0 0x600100 /* Scratch register 0 (64 bits) */
32 #define NI_SCRATCH_REG1 0x600108 /* Scratch register 1 (64 bits) */
33 #define NI_DIAG_PARMS 0x600110 /* Parameters for diags */
35 #define NI_VECTOR_PARMS 0x600200 /* Vector PIO routing parameters */
[all …]
/linux/arch/arm/mach-davinci/
H A Dda8xx.h33 #define DA8XX_CP_INTC_BASE 0xfffee000
37 #define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000)
39 #define DA8XX_JTAG_ID_REG 0x18
40 #define DA8XX_HOST1CFG_REG 0x44
41 #define DA8XX_CHIPSIG_REG 0x174
42 #define DA8XX_CFGCHIP0_REG 0x17c
43 #define DA8XX_CFGCHIP1_REG 0x180
44 #define DA8XX_CFGCHIP2_REG 0x184
45 #define DA8XX_CFGCHIP3_REG 0x188
46 #define DA8XX_CFGCHIP4_REG 0x18c
[all …]
/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2hk.dtsi16 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
62 reg = <0x0c000000 0x600000>;
63 ranges = <0x0 0x0c000000 0x600000>;
68 reg = <0x5f0000 0x8000>;
78 0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
79 0xa40 8 0xa40 8 0x840 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 1: dsp1 */
80 0xa44 8 0xa44 8 0x844 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 2: dsp2 */
81 0xa48 8 0xa48 8 0x848 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 3: dsp3 */
[all …]
/linux/arch/arm/boot/dts/moxa/
H A Dmoxart-uc7112lx.dts16 reg = <0x0 0x2000000>;
22 #clock-cells = <0>;
27 flash@80000000,0 {
29 reg = <0x80000000 0x1000000>;
33 partition@0 {
35 reg = <0x0 0x40000>;
39 reg = <0x40000 0x1C0000>;
43 reg = <0x200000 0x800000>;
47 reg = <0xa00000 0x600000>;
55 gpios = <&gpio 27 0x1>;
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91sam9x5cm.dtsi11 reg = <0x20000000 0x8000000>;
27 timer@0 {
29 reg = <0>;
40 pinctrl_1wire_cm: 1wire_cm-0 {
52 pinctrl-0 = <&pinctrl_ebi_addr_nand
59 pinctrl-0 = <&pinctrl_nand_oe_we
65 reg = <0x3 0x0 0x800000>;
80 at91bootstrap@0 {
82 reg = <0x0 0x40000>;
87 reg = <0x40000 0xc0000>;
[all …]
H A Dat91-cosino.dtsi24 reg = <0x20000000 0x8000000>;
49 pinctrl-0 = <&pinctrl_ebi_addr_nand
55 pinctrl-0 = <&pinctrl_nand_oe_we
62 reg = <0x3 0x0 0x800000>;
77 at91bootstrap@0 {
79 reg = <0x0 0x40000>;
84 reg = <0x40000 0x80000>;
89 reg = <0xc0000 0x140000>;
94 reg = <0x200000 0x600000>;
99 reg = <0x800000 0x0f800000>;
[all …]
H A Dsama5d3xcm.dtsi18 reg = <0x20000000 0x20000000>;
34 cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
38 timer@0 {
40 reg = <0>;
51 pinctrl-0 = <&pinctrl_ebi_addr &pinctrl_ebi_cs0>;
55 nor: flash@0,0 {
57 linux,mtd-name = "physmap-flash.0";
60 reg = <0x0 0x0 0x1000000>;
65 atmel,smc-ncs-rd-setup-ns = <0>;
66 atmel,smc-ncs-wr-setup-ns = <0>;
[all …]
H A Dat91-q5xr5.dts20 reg = <0x20000000 0x0>;
28 main_clock: clock@0 {
50 flash: flash@0 {
54 reg = <0x0 0x1000000 0x800000>;
62 kernel@0 {
64 reg = <0x0 0x200000>;
69 reg = <0x200000 0x600000>;
88 pinctrl_spi0: spi0-0 {
90 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
105 pinctrl_spi1: spi1-0 {
[all …]
H A Dsama5d3xcm_cmp.dtsi16 reg = <0x20000000 0x20000000>;
32 cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
36 timer@0 {
38 reg = <0>;
50 #size-cells = <0>;
53 reg = <0x1>;
67 reg = <0x7>;
84 reg = <0x5b>;
127 pinctrl-0 = <&pinctrl_ebi_nand_addr>;
135 reg = <0x3 0x0 0x2>;
[all …]
H A Dat91sam9rlek.dts21 reg = <0x20000000 0x4000000>;
42 atmel,dmacon = <0x1>;
43 atmel,lcdcon2 = <0x80008002>;
56 vfront-porch = <0>;
67 pinctrl-0 = <&pinctrl_ebi_addr_nand>;
73 pinctrl-0 = <&pinctrl_nand_oe_we
79 reg = <0x3 0x0 0x800000>;
92 at91bootstrap@0 {
94 reg = <0x0 0x40000>;
99 reg = <0x40000 0x80000>;
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm53015-meraki-mr26.dts19 memory@0 {
20 reg = <0x00000000 0x08000000>;
27 led-0 {
77 #address-cells = <0x1>;
78 #size-cells = <0x1>;
80 partition@0 {
82 reg = <0x0 0x200000>;
88 reg = <0x200000 0x200000>;
94 reg = <0x400000 0x200000>;
100 reg = <0x600000 0x200000>;
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-ib62x0.dts13 reg = <0x00000000 0x10000000>;
61 pinctrl-0 = <&pmx_button_reset &pmx_button_usb_copy>;
78 pinctrl-0 = <&pmx_led_os_red &pmx_led_os_green
99 pinctrl-0 = <&pmx_power_off>;
108 partition@0 {
110 reg = <0x0000000 0xe0000>;
115 reg = <0xe0000 0x20000>;
120 reg = <0x0100000 0x600000>;
125 reg = <0x0700000 0xf900000>;
141 ethernet0-port@0 {
H A Dkirkwood-mplcec4.dts13 reg = <0x00000000 0x20000000>;
74 reg = <0x51>;
79 reg = <0x57>;
93 pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
100 pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>;
110 pinctrl-0 = < &pmx_led_health
158 partition@0 {
160 reg = <0x0000000 0x100000>;
165 reg = <0x100000 0x80000>;
170 reg = <0x180000 0x80000>;
[all …]
H A Dkirkwood-topkick.dts13 reg = <0x00000000 0x10000000>;
34 pinctrl-0 = <&pmx_sw_left &pmx_sw_right
103 pinctrl-0 = <&pmx_sdio>;
125 pinctrl-0 = <&pmx_led_disk_yellow &pmx_led_sys_red
156 #size-cells = <0>;
157 pinctrl-0 = <&pmx_sata0_pwr_enable>;
169 gpio = <&gpio1 4 0>;
177 partition@0 {
179 reg = <0x0000000 0x180000>;
184 reg = <0x0180000 0x20000>;
[all …]
H A Dkirkwood-netgear_readynas_duo_v2.dts19 reg = <0x00000000 0x10000000>;
78 #clock-cells = <0>;
88 reg = <0x32>;
93 reg = <0x3e>;
95 fan_gear_mode = <0>;
97 pwm_polarity = <0>;
113 pinctrl-0 = < &pmx_led_blue_power &pmx_led_blue_activity
147 pinctrl-0 = <&pmx_button_power &pmx_button_backup
172 pinctrl-0 = <&pmx_poweroff>;
180 #size-cells = <0>;
[all …]
/linux/drivers/phy/rockchip/
H A Dphy-rockchip-inno-hdmi.c25 /* REG: 0x00 */
26 #define RK3228_PRE_PLL_REFCLK_SEL_PCLK BIT(0)
27 /* REG: 0x01 */
30 #define RK3228_BYPASS_PLLPD_EN BIT(0)
31 /* REG: 0x02 */
33 #define RK3228_PDATAEN_DISABLE BIT(0)
34 /* REG: 0x03 */
36 #define RK3228_AUTO_TERM_RES_CAL_SPEED_14_8(x) UPDATE(x, 6, 0)
37 /* REG: 0x04 */
38 #define RK3228_AUTO_TERM_RES_CAL_SPEED_7_0(x) UPDATE(x, 7, 0)
[all …]
/linux/arch/m68k/include/asm/
H A Damigayle.h25 #define GAYLE_RAM (0x600000+zTwoBase)
26 #define GAYLE_RAMSIZE (0x400000)
27 #define GAYLE_ATTRIBUTE (0xa00000+zTwoBase)
28 #define GAYLE_ATTRIBUTESIZE (0x020000)
29 #define GAYLE_IO (0xa20000+zTwoBase) /* 16bit and even 8bit registers */
30 #define GAYLE_IOSIZE (0x010000)
31 #define GAYLE_IO_8BITODD (0xa30000+zTwoBase) /* odd 8bit registers */
40 u_char pad0[0x1000-1];
43 u_char pad1[0x1000-1];
46 u_char pad2[0x1000-1];
[all …]
/linux/drivers/crypto/intel/qat/qat_common/
H A Dicp_qat_hal.h8 MISC_CONTROL = 0xA04,
9 ICP_RESET = 0xA0c,
10 ICP_GLOBAL_CLK_ENABLE = 0xA50
14 MISC_CONTROL_C4XXX = 0xAA0,
15 ICP_RESET_CPP0 = 0x938,
16 ICP_RESET_CPP1 = 0x93c,
17 ICP_GLOBAL_CLK_ENABLE_CPP0 = 0x964,
18 ICP_GLOBAL_CLK_ENABLE_CPP1 = 0x968
22 USTORE_ADDRESS = 0x000,
23 USTORE_DATA_LOWER = 0x004,
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-gta04a5one.dts17 OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
18 OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
19 OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
22 OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
23 OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
24 OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
25 OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
26 OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
27 OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
28 OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb/
H A Delmer0.h39 #define A_ELMER0_VERSION 0x100000
40 #define A_ELMER0_PHY_CFG 0x100004
41 #define A_ELMER0_INT_ENABLE 0x100008
42 #define A_ELMER0_INT_CAUSE 0x10000c
43 #define A_ELMER0_GPI_CFG 0x100010
44 #define A_ELMER0_GPI_STAT 0x100014
45 #define A_ELMER0_GPO 0x100018
46 #define A_ELMER0_PORT0_MI1_CFG 0x400000
48 #define S_MI1_MDI_ENABLE 0
61 #define M_MI1_SOF 0x3
[all …]

12345