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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7d-remarkable2.dts23 reg = <0x80000000 0x40000000>;
54 pinctrl-0 = <&pinctrl_brcm_reg>;
66 pinctrl-0 = <&pinctrl_digitizer_reg>;
79 pinctrl-0 = <&pinctrl_touch_reg>;
87 pinctrl-0 = <&pinctrl_wifi>;
102 assigned-clock-rates = <0>, <32768>;
108 pinctrl-0 = <&pinctrl_i2c1>;
113 reg = <0x09>;
114 hid-descr-addr = <0x01>;
116 pinctrl-0 = <&pinctrl_wacom>;
[all …]
H A Dimx7d-pico.dtsi12 pwms = <&pwm4 0 50000 0>;
13 brightness-levels = <0 36 72 108 144 180 216 255>;
20 reg = <0x80000000 0>;
38 pinctrl-0 = <&pinctrl_reg_lcdreg_on>;
49 pinctrl-0 = <&pinctrl_reg_wlreg_on>;
75 pinctrl-0 = <&pinctrl_usbotg1_pwr>;
108 assigned-clock-rates = <0>, <32768>;
122 pinctrl-0 = <&pinctrl_ecspi3>;
128 pinctrl-0 = <&pinctrl_enet1>;
132 assigned-clock-rates = <0>, <100000000>;
[all …]
H A Dimx7s-warp.dts18 reg = <0x80000000 0x20000000>;
23 pinctrl-0 = <&pinctrl_gpio>;
39 pinctrl-0 = <&pinctrl_brcm_reg>;
49 pinctrl-0 = <&pinctrl_bt_reg>;
94 pinctrl-0 = <&pinctrl_i2c1>;
99 reg = <0x08>;
193 pinctrl-0 = <&pinctrl_i2c2>;
199 pinctrl-0 = <&pinctrl_ov2680>;
200 reg = <0x36>;
211 clock-lanes = <0>;
[all …]
H A Dimx7-colibri.dtsi15 brightness-levels = <0 45 63 88 119 158 203 255>;
20 pinctrl-0 = <&pinctrl_gpio_bl_on>;
22 pwms = <&pwm1 0 6666667 PWM_POLARITY_INVERTED>;
34 pinctrl-0 = <&pinctrl_usbc_det>;
40 pinctrl-0 = <&pinctrl_gpiokeys>;
111 pinctrl-0 = <&pinctrl_usbh_reg>;
151 pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
157 assigned-clock-rates = <0>, <100000000>;
170 pinctrl-0 = <&pinctrl_enet1>;
175 #size-cells = <0>;
[all …]
H A Dimx1-pinfunc.h15 * function: 0 - Primary function
18 * direction: 0 - Input
20 * gpio_oconf: 0 - A_IN
24 * gpio_iconfa/b: 0 - GPIO_IN
26 * 2 - 0
29 * 'pin' is an integer between 0 and 0xbf. i.MX1 has 4 ports with 32
31 * the pin number on the specific port (between 0 and 31).
34 #define MX1_PAD_A24__A24 0x00 0x004
35 #define MX1_PAD_A24__GPIO1_0 0x00 0x032
36 #define MX1_PAD_A24__SPI2_CLK 0x00 0x006
[all …]
/linux/Documentation/admin-guide/
H A Dbtmrvl.rst14 bit 8:0 -- Gap
18 It could be any valid GPIO pin# (e.g. 0-7) or 0xff (SDIO interface
22 wakeup event, or 0xff for special host sleep setting.
26 # Use SDIO interface to wake up the host and set GAP to 0x80:
27 echo 0xff80 > /debug/btmrvl/config/gpiogap
30 # Use GPIO pin #3 to wake up the host and set GAP to 0xff:
31 echo 0x03ff > /debug/btmrvl/config/gpiogap
40 0 -- Disable auto sleep mode
49 echo 0 > /debug/btmrvl/config/psmode
59 0 -- Wake up firmware
[all …]
/linux/drivers/scsi/aic7xxx/
H A Daic79xx_seq.h_shipped9 0xff, 0x02, 0x06, 0x78,
10 0x00, 0xea, 0x6e, 0x59,
11 0x01, 0xea, 0x04, 0x30,
12 0xff, 0x04, 0x0c, 0x78,
13 0x19, 0xea, 0x6e, 0x59,
14 0x19, 0xea, 0x04, 0x00,
15 0x33, 0xea, 0x68, 0x59,
16 0x33, 0xea, 0x00, 0x00,
17 0x60, 0x3a, 0x3a, 0x68,
18 0x04, 0x4d, 0x35, 0x78,
[all …]
/linux/drivers/soc/qcom/
H A Dspm.c29 #define SPM_CTL_INDEX 0x7f
31 #define SPM_CTL_EN BIT(0)
34 #define SPM_VCTL_VLVL GENMASK(7, 0)
35 #define SPM_PMIC_DATA_0_VLVL GENMASK(7, 0)
36 #define SPM_PMIC_DATA_1_MIN_VSEL GENMASK(5, 0)
91 [SPM_REG_AVS_CTL] = 0x904,
92 [SPM_REG_AVS_LIMIT] = 0x908,
97 .avs_ctl = 0x1010031,
98 .avs_limit = 0x4580458,
103 .avs_ctl = 0x101c031,
[all …]
/linux/crypto/
H A Ddh.c27 memset(ctx, 0, sizeof(*ctx)); in dh_clear_ctx()
50 return (p_len < 2048) ? -EINVAL : 0; in dh_check_params_length()
52 return (p_len < 1536) ? -EINVAL : 0; in dh_check_params_length()
68 return 0; in dh_set_params()
80 if (crypto_dh_decode_key(buf, len, &params) < 0) in dh_set_secret()
83 if (dh_set_params(ctx, &params) < 0) in dh_set_secret()
90 return 0; in dh_set_secret()
113 return 0; in dh_is_pubkey_valid()
126 if (mpi_cmp_ui(y, 1) < 1 || mpi_cmp(y, ctx->p) >= 0) in dh_is_pubkey_valid()
134 val = mpi_alloc(0); in dh_is_pubkey_valid()
[all …]
/linux/lib/crypto/
H A Dcurve25519-selftest.c16 .private = { 0x77, 0x07, 0x6d, 0x0a, 0x73, 0x18, 0xa5, 0x7d,
17 0x3c, 0x16, 0xc1, 0x72, 0x51, 0xb2, 0x66, 0x45,
18 0xdf, 0x4c, 0x2f, 0x87, 0xeb, 0xc0, 0x99, 0x2a,
19 0xb1, 0x77, 0xfb, 0xa5, 0x1d, 0xb9, 0x2c, 0x2a },
20 .public = { 0xde, 0x9e, 0xdb, 0x7d, 0x7b, 0x7d, 0xc1, 0xb4,
21 0xd3, 0x5b, 0x61, 0xc2, 0xec, 0xe4, 0x35, 0x37,
22 0x3f, 0x83, 0x43, 0xc8, 0x5b, 0x78, 0x67, 0x4d,
23 0xad, 0xfc, 0x7e, 0x14, 0x6f, 0x88, 0x2b, 0x4f },
24 .result = { 0x4a, 0x5d, 0x9d, 0x5b, 0xa4, 0xce, 0x2d, 0xe1,
25 0x72, 0x8e, 0x3b, 0xf4, 0x80, 0x35, 0x0f, 0x25,
[all …]
H A Dblake2s-selftest.c28 * for (i = 0; i < len; i++) {
29 * if (i && (i % 12) == 0)
31 * printf("0x%02x, ", vec[i]);
43 * key[0] = key[1] = 1;
47 * for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i)
52 * for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i) {
62 * return 0;
66 { 0xa1, },
67 { 0x7c, 0x89, },
68 { 0x74, 0x0e, 0xd4, },
[all …]
H A Daesgcm.c43 * Returns: 0 on success, or -EINVAL if @keysize or @authsize contain values
60 return 0; in aesgcm_expandkey()
67 while (len > 0) { in aesgcm_ghash()
114 while (len > 0) { in aesgcm_crypt()
261 "\x5b\xc9\x4f\xbc\x32\x21\xa5\xdb"
304 "\x26\x5b\x98\xb5\xd4\x8a\xb9\x19";
375 "\x58\x83\xf0\xc3\x70\x14\xc0\x5b"
378 "\xc6\x6a\x63\x39\x8a\x5b\xde\xcb"
419 "\x23\x27\x5b\x8b\x4b\xa5\x64\x97"
475 "\x3b\x4e\xac\xe8\x5b\xe
[all...]
H A Dchacha20poly1305-selftest.c31 0x49, 0x6e, 0x74, 0x65, 0x72, 0x6e, 0x65, 0x74,
32 0x2d, 0x44, 0x72, 0x61, 0x66, 0x74, 0x73, 0x20,
33 0x61, 0x72, 0x65, 0x20, 0x64, 0x72, 0x61, 0x66,
34 0x74, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65,
35 0x6e, 0x74, 0x73, 0x20, 0x76, 0x61, 0x6c, 0x69,
36 0x64, 0x20, 0x66, 0x6f, 0x72, 0x20, 0x61, 0x20,
37 0x6d, 0x61, 0x78, 0x69, 0x6d, 0x75, 0x6d, 0x20,
38 0x6f, 0x66, 0x20, 0x73, 0x69, 0x78, 0x20, 0x6d,
39 0x6f, 0x6e, 0x74, 0x68, 0x73, 0x20, 0x61, 0x6e,
40 0x64, 0x20, 0x6d, 0x61, 0x79, 0x20, 0x62, 0x65,
[all …]
/linux/drivers/hid/
H A Dhid-uclogic-core-test.c22 .event = { 0xA1, 0xB2, 0xC3, 0xD4 },
26 .event = { 0x1F, 0x2E, 0x3D, 0x4C, 0x5B, 0x6A },
33 .event = { 0xA1, 0xB2, 0xC3, 0xD4 },
38 .event = { 0x1F, 0x2E, 0x3D, 0x4C, 0x5B, 0x6A },
43 .event = { 0xA1, 0xB2, 0xC3 },
48 .event = { 0xA1, 0xB2, 0xC3, 0xD4, 0x00 },
53 .event = { 0x2E, 0x3D, 0x4C, 0x5B, 0x6A, 0x1F },
66 struct uclogic_params p = {0, }; in hid_test_uclogic_exec_event_hook_test()
76 for (n = 0; n < ARRAY_SIZE(hook_events); n++) { in hid_test_uclogic_exec_event_hook_test()
83 memcpy(filter->event, &hook_events[n].event[0], filter->size); in hid_test_uclogic_exec_event_hook_test()
[all …]
/linux/Documentation/devicetree/bindings/power/supply/
H A Dcw2015_battery.yaml61 #size-cells = <0>;
65 reg = <0x62>;
67 0x17 0x67 0x80 0x73 0x6E 0x6C 0x6B 0x63
68 0x77 0x51 0x5C 0x58 0x50 0x4C 0x48 0x36
69 0x15 0x0C 0x0C 0x19 0x5B 0x7D 0x6F 0x69
70 0x69 0x5B 0x0C 0x29 0x20 0x40 0x52 0x59
71 0x57 0x56 0x54 0x4F 0x3B 0x1F 0x7F 0x17
72 0x06 0x1A 0x30 0x5A 0x85 0x93 0x96 0x2D
73 0x48 0x77 0x9C 0xB3 0x80 0x52 0x94 0xCB
74 0x2F 0x00 0x64 0xA5 0xB5 0x11 0xF0 0x11
/linux/drivers/ata/
H A Dpata_hpt3x2n.c31 USE_DPLL = (1 << 0)
41 * 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA.
50 * 21 CLK frequency for UDMA: 0=ATA clock, 1=dual ATA clock.
64 { XFER_UDMA_7, 0x1c869c62 },
65 { XFER_UDMA_6, 0x1c869c62 },
66 { XFER_UDMA_5, 0x1c8a9c62 },
67 { XFER_UDMA_4, 0x1c8a9c62 },
68 { XFER_UDMA_3, 0x1c8e9c62 },
69 { XFER_UDMA_2, 0x1c929c62 },
70 { XFER_UDMA_1, 0x1c9a9c62 },
[all …]
H A Dpata_hpt37x.c41 * 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA.
50 * 21 CLK frequency for UDMA: 0=ATA clock, 1=dual ATA clock.
62 { XFER_UDMA_6, 0x12446231 }, /* 0x12646231 ?? */
63 { XFER_UDMA_5, 0x12446231 },
64 { XFER_UDMA_4, 0x12446231 },
65 { XFER_UDMA_3, 0x126c6231 },
66 { XFER_UDMA_2, 0x12486231 },
67 { XFER_UDMA_1, 0x124c6233 },
68 { XFER_UDMA_0, 0x12506297 },
70 { XFER_MW_DMA_2, 0x22406c31 },
[all …]
/linux/drivers/video/fbdev/sis/
H A Dinitextlfb.c40 unsigned short ModeIdIndex = 0, ClockIndex = 0; in sisfb_mode_rate_to_dclock()
41 unsigned short RRTI = 0; in sisfb_mode_rate_to_dclock()
46 if(rateindex > 0) rateindex--; in sisfb_mode_rate_to_dclock()
50 case 0x5a: ModeNo = 0x50; break; in sisfb_mode_rate_to_dclock()
51 case 0x5b: ModeNo = 0x56; in sisfb_mode_rate_to_dclock()
85 unsigned short ModeIdIndex = 0, index = 0, RRTI = 0; in sisfb_mode_rate_to_ddata()
88 if(!SiSInitPtr(SiS_Pr)) return 0; in sisfb_mode_rate_to_ddata()
90 if(rateindex > 0) rateindex--; in sisfb_mode_rate_to_ddata()
94 case 0x5a: ModeNo = 0x50; break; in sisfb_mode_rate_to_ddata()
95 case 0x5b: ModeNo = 0x56; in sisfb_mode_rate_to_ddata()
[all …]
/linux/drivers/gpu/drm/panel/
H A Dpanel-samsung-db7430.c24 #define DB7430_ACCESS_PROT_OFF 0xb0
25 #define DB7430_UNKNOWN_B4 0xb4
26 #define DB7430_USER_SELECT 0xb5
27 #define DB7430_UNKNOWN_B7 0xb7
28 #define DB7430_UNKNOWN_B8 0xb8
29 #define DB7430_PANEL_DRIVING 0xc0
30 #define DB7430_SOURCE_CONTROL 0xc1
31 #define DB7430_GATE_INTERFACE 0xc4
32 #define DB7430_DISPLAY_H_TIMING 0xc5
33 #define DB7430_RGB_SYNC_OPTION 0xc6
[all …]
/linux/arch/x86/kernel/cpu/microcode/
H A Damd_shas.c3 { 0x8001227, {
4 0x99,0xc0,0x9b,0x2b,0xcc,0x9f,0x52,0x1b,
5 0x1a,0x5f,0x1d,0x83,0xa1,0x6c,0xc4,0x46,
6 0xe2,0x6c,0xda,0x73,0xfb,0x2d,0x23,0xa8,
7 0x77,0xdc,0x15,0x31,0x33,0x4a,0x46,0x18,
10 { 0x8001250, {
11 0xc0,0x0b,0x6b,0x19,0xfd,0x5c,0x39,0x60,
12 0xd5,0xc3,0x57,0x46,0x54,0xe4,0xd1,0xaa,
13 0xa8,0xf7,0x1f,0xa8,0x6a,0x60,0x3e,0xe3,
14 0x27,0x39,0x8e,0x53,0x30,0xf8,0x49,0x19,
[all …]
/linux/fs/xfs/
H A Dxfs_dahash_test.c20 0x5b, 0x85, 0x21, 0xcb, 0x09, 0x68, 0x7d, 0x30,
21 0xc7, 0x69, 0xd7, 0x30, 0x92, 0xde, 0x59, 0xe4,
22 0xc9, 0x6e, 0x8b, 0xdb, 0x98, 0x6b, 0xaa, 0x60,
23 0xa8, 0xb5, 0xbc, 0x6c, 0xa9, 0xb1, 0x5b, 0x2c,
24 0xea, 0xb4, 0x92, 0x6a, 0x3f, 0x79, 0x91, 0xe4,
25 0xe9, 0x70, 0x51, 0x8c, 0x7f, 0x95, 0x6f, 0x1a,
26 0x56, 0xa1, 0x5c, 0x27, 0x03, 0x67, 0x9f, 0x3a,
27 0xe2, 0x31, 0x11, 0x29, 0x6b, 0x98, 0xfc, 0xc4,
28 0x53, 0x24, 0xc5, 0x8b, 0xce, 0x47, 0xb2, 0xb9,
29 0x32, 0xcb, 0xc1, 0xd0, 0x03, 0x57, 0x4e, 0xd4,
[all …]
/linux/include/linux/mfd/
H A Drohm-bd96801.h7 #define BD96801_REG_SSCG_CTRL 0x09
8 #define BD96801_REG_SHD_INTB 0x20
9 #define BD96801_LDO5_VOL_LVL_REG 0x2c
10 #define BD96801_LDO6_VOL_LVL_REG 0x2d
11 #define BD96801_LDO7_VOL_LVL_REG 0x2e
12 #define BD96801_REG_BUCK_OVP 0x30
13 #define BD96801_REG_BUCK_OVD 0x35
14 #define BD96801_REG_LDO_OVP 0x31
15 #define BD96801_REG_LDO_OVD 0x36
16 #define BD96801_REG_BOOT_OVERTIME 0x3a
[all …]
/linux/net/wireless/certs/
H A Dsforshee.hex2 0x30, 0x82, 0x02, 0xa4, 0x30, 0x82, 0x01, 0x8c,
3 0x02, 0x09, 0x00, 0xb2, 0x8d, 0xdf, 0x47, 0xae,
4 0xf9, 0xce, 0xa7, 0x30, 0x0d, 0x06, 0x09, 0x2a,
5 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x0b,
6 0x05, 0x00, 0x30, 0x13, 0x31, 0x11, 0x30, 0x0f,
7 0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x08, 0x73,
8 0x66, 0x6f, 0x72, 0x73, 0x68, 0x65, 0x65, 0x30,
9 0x20, 0x17, 0x0d, 0x31, 0x37, 0x31, 0x30, 0x30,
10 0x36, 0x31, 0x39, 0x34, 0x30, 0x33, 0x35, 0x5a,
11 0x18, 0x0f, 0x32, 0x31, 0x31, 0x37, 0x30, 0x39,
[all …]
/linux/drivers/net/wireless/broadcom/b43/
H A Dradio_2056.h9 #define B2056_SYN (0x0 << 12)
10 #define B2056_TX0 (0x2 << 12)
11 #define B2056_TX1 (0x3 << 12)
12 #define B2056_RX0 (0x6 << 12)
13 #define B2056_RX1 (0x7 << 12)
14 #define B2056_ALLTX (0xE << 12)
15 #define B2056_ALLRX (0xF << 12)
17 #define B2056_SYN_RESERVED_ADDR0 0x00
18 #define B2056_SYN_IDCODE 0x01
19 #define B2056_SYN_RESERVED_ADDR2 0x02
[all …]
/linux/sound/soc/codecs/
H A Drt274.h14 #define RT274_AUDIO_FUNCTION_GROUP 0x01
15 #define RT274_DAC_OUT0 0x02
16 #define RT274_DAC_OUT1 0x03
17 #define RT274_ADC_IN2 0x08
18 #define RT274_ADC_IN1 0x09
19 #define RT274_DIG_CVT 0x0a
20 #define RT274_DMIC1 0x12
21 #define RT274_DMIC2 0x13
22 #define RT274_MIC 0x19
23 #define RT274_LINE1 0x1a
[all …]

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