Searched +full:0 +full:x54300000 (Results 1 – 8 of 8) sorted by relevance
15 pattern: "^mipi@[0-9a-f]+$"58 reg = <0x700e3000 0x100>;66 reg = <0x54300000 0x00040000>;73 nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */
175 use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to202 - description: host1x syncpoint interrupt 0226 use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to240 reg = <0x50000000 0x00024000>;241 interrupts = <0 65 0x04>, /* mpcore syncpt */242 <0 67 0x04>; /* mpcore general */252 ranges = <0x54000000 0x54000000 0x04000000>;256 reg = <0x54040000 0x00040000>;257 interrupts = <0 68 0x04>;265 reg = <0x54080000 0x00040000>;[all …]
106 - reg: csi port number. Valid port numbers are 0 through 5.120 port@0 with single child 'endpoint' node always a sink.123 port@0 (required node)125 - reg: 0440 reg = <0x50000000 0x00024000>;441 interrupts = <0 65 0x04 /* mpcore syncpt */442 0 67 0x04>; /* mpcore general */452 ranges = <0x54000000 0x54000000 0x04000000>;456 reg = <0x54040000 0x00040000>;457 interrupts = <0 68 0x04>;[all …]
17 reg = <0x80000000 0x0>;22 reg = <0x40000000 0x40000>;25 ranges = <0 0x40000000 0x40000>;28 reg = <0x400 0x3fc00>;35 reg = <0x5000000[all...]
17 memory@0 {19 reg = <0 0>;24 reg = <0x40000000 0x40000>;27 ranges = <0 0x40000000 0x40000>;30 reg = <0x400 0x3fc0[all...]
20 reg = <0x80000000 0x0>;26 reg = <0x00003000 0x00000800>, /* PADS registers */27 <0x00003800 0x00000200>, /* AFI registers */28 <0x10000000 0x10000000>; /* configuration space */35 interrupt-map-mask = <0 0 [all...]
21 reg = <0x0 0x01003000 0x0 0x00000800>, /* PADS registers */22 <0x0 0x01003800 0x0 0x00000800>, /* AFI registers */23 <0x0 0x0200000[all...]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]