Searched +full:0 +full:x53fbc000 (Results 1 – 6 of 6) sorted by relevance
106 reg = <0x53fbc000 0x4000>;121 reg = <0x10021000 0x1000>;130 fsl,pcr = <0xf0c88080>; /* non-standard but required */
39 #size-cells = <0>;41 cpu@0 {44 reg = <0>;52 reg = <0x68000000 0x10000000>;64 reg = <0x30000000 0x1000>;73 reg = <0x43f00000 0x100000>;78 #size-cells = <0>;80 reg = <0x43f80000 0x4000>;89 #size-cells = <0>;91 reg = <0x43f84000 0x4000>;[all …]
48 #size-cells = <0>;49 cpu@0 {52 reg = <0x0>;60 reg = <0x0fffc000 0x4000>;66 #clock-cells = <0>;72 #clock-cells = <0>;78 #clock-cells = <0>;79 clock-frequency = <0>;84 #clock-cells = <0>;[all...]
47 #size-cells = <0>;49 cpu@0 {52 reg = <0>;60 reg = <0x68000000 0x8000000>;66 #clock-cells = <0>;73 #phy-cells = <0>;78 #phy-cells = <0>;92 reg = <0x43f00000 0x10000[all...]
51 #size-cells = <0>;52 cpu0: cpu@0 {55 reg = <0x0>;84 reg = <0x0fffc000 0x4000>;90 #clock-cells = <0>;96 #clock-cells = <0>;102 #clock-cells = <0>;103 clock-frequency = <0>;108 #clock-cells = <0>;[all...]
44 #size-cells = <0>;46 cpu@0 {49 reg = <0x0>;52 d-cache-size = <0x8000>;53 i-cache-size = <0x8000>;55 l2-cache-line = <0x40000>;56 timebase-frequency = <0>;57 bus-frequency = <0>;58 clock-frequency = <0>;62 localbus@0fffc000 {[all …]