/freebsd/sys/crypto/des/arch/i386/ |
H A D | des_enc.S | 85 andl $0xf0f0f0f0, %eax 92 andl $0xfff0000f, %edi 99 andl $0x33333333, %eax 106 andl $0x03fc03fc, %esi 113 andl $0xaaaaaaaa, %eax 120 cmpl $0, %ebx 123 /* Round 0 */ 129 andl $0xfcfcfcfc, %eax 130 andl $0xcfcfcfcf, %edx 137 movl 0x200+_C_LABEL(des_SPtrans)(%ecx),%ebp [all …]
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/freebsd/sys/crypto/openssl/i386/ |
H A D | crypt586.S | 52 andl $0xfcfcfcfc,%eax 54 andl $0xcfcfcfcf,%edx 62 xorl 0x200(%ebp,%ecx,1),%edi 65 xorl 0x100(%ebp,%ebx,1),%edi 68 xorl 0x300(%ebp,%ecx,1),%edi 70 andl $0xff,%eax 71 andl $0xff,%edx 72 movl 0x600(%ebp,%ebx,1),%ebx 74 movl 0x700(%ebp,%ecx,1),%ebx 76 movl 0x400(%ebp,%eax,1),%ebx [all …]
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H A D | des-586.S | 21 andl $0xfcfcfcfc,%eax 22 andl $0xcfcfcfcf,%edx 28 xorl 0x200(%ebp,%ecx,1),%edi 31 xorl 0x100(%ebp,%ebx,1),%edi 34 xorl 0x300(%ebp,%ecx,1),%edi 36 andl $0xff,%eax 37 andl $0xff,%edx 38 xorl 0x600(%ebp,%ebx,1),%edi 39 xorl 0x700(%ebp,%ecx,1),%edi 41 xorl 0x400(%ebp,%eax,1),%edi [all …]
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/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/ |
H A D | lpc18xx-ccu.h | 13 #define CLK_APB3_BUS 0x100 14 #define CLK_APB3_I2C1 0x108 15 #define CLK_APB3_DAC 0x110 16 #define CLK_APB3_ADC0 0x118 17 #define CLK_APB3_ADC1 0x120 18 #define CLK_APB3_CAN0 0x128 19 #define CLK_APB1_BUS 0x200 20 #define CLK_APB1_MOTOCON_PWM 0x208 21 #define CLK_APB1_I2C0 0x210 22 #define CLK_APB1_I2S 0x218 [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | msm8994.dtsi | 29 #clock-cells = <0>; 36 #clock-cells = <0>; 44 #size-cells = <0>; 46 CPU0: cpu@0 { 49 reg = <0x0 0x0>; 62 reg = <0x0 0x1>; 70 reg = <0x0 0x2>; 78 reg = <0x0 0x3>; 86 reg = <0x0 0x100>; 99 reg = <0x0 0x101>; [all …]
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H A D | msm8939.dtsi | 30 #clock-cells = <0>; 36 #clock-cells = <0>; 43 #size-cells = <0>; 49 reg = <0x100>; 67 reg = <0x101>; 80 reg = <0x102>; 93 reg = <0x103>; 102 CPU4: cpu@0 { 106 reg = <0x0>; 124 reg = <0x1>; [all …]
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H A D | msm8916.dtsi | 27 reg = <0 0x80000000 0 0>; 36 reg = <0x0 0x86000000 0x0 0x300000>; 42 reg = <0x0 0x86300000 0x0 0x100000>; 50 reg = <0x0 0x86400000 0x0 0x100000>; 55 reg = <0x0 0x86500000 0x0 0x180000>; 60 reg = <0x0 0x86680000 0x0 0x80000>; 66 reg = <0x0 0x86700000 0x0 0xe0000>; 73 reg = <0x0 0x867e0000 0x0 0x20000>; 85 * alignment = <0x0 0x400000>; 86 * alloc-ranges = <0x0 0x86800000 0x0 0x8000000>; [all …]
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
H A D | pq3-rmu-0.dtsi | 2 * PQ3 RIO Message Unit device tree stub [ controller @ offset 0xd3000 ] 39 reg = <0xd3000 0x500>; 40 ranges = <0x0 0xd3000 0x500>; 42 message-unit@0 { 44 reg = <0x0 0x100>; 46 53 2 0 0 /* msg1_tx_irq */ 47 54 2 0 0>;/* msg1_rx_irq */ 51 reg = <0x100 0x100>; 53 55 2 0 0 /* msg2_tx_irq */ 54 56 2 0 0>;/* msg2_rx_irq */ [all …]
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H A D | qoriq-rmu-0.dtsi | 2 * QorIQ RIO Message Unit device tree stub [ controller @ offset 0xd3000 ] 39 reg = <0xd3000 0x500>; 40 ranges = <0x0 0xd3000 0x500>; 42 message-unit@0 { 44 reg = <0x0 0x100>; 46 60 2 0 0 /* msg1_tx_irq */ 47 61 2 0 0>;/* msg1_rx_irq */ 51 reg = <0x100 0x100>; 53 62 2 0 0 /* msg2_tx_irq */ 54 63 2 0 0>;/* msg2_rx_irq */ [all …]
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/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | armada-xp.dtsi | 35 reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>; 41 reg = <0x1400 0x500>; 46 reg = <0x08000 0x1000>; 47 cache-id-part = <0x100>; 55 pinctrl-0 = <&uart2_pins>; 57 reg = <0x12200 0x100>; 61 clocks = <&coreclk 0>; 67 pinctrl-0 = <&uart3_pins>; 69 reg = <0x12300 0x100>; 73 clocks = <&coreclk 0>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
H A D | toshiba,tc358775.yaml | 30 description: i2c address of the bridge, 0x0f 50 port@0: 83 - port@0 115 reg = <0x078b8000 0x500>; 118 #size-cells = <0>; 122 reg = <0x0f>; 132 #size-cells = <0>; 134 port@0 { 135 reg = <0>; 153 reg = <0x1a98000 0x25c>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/media/ |
H A D | microchip,csi2dc.yaml | 76 port@0: 129 - port@0 147 reg = <0xe1404000 0x500>; 153 #size-cells = <0>; 154 port@0 { 155 reg = <0>; /* must be 0, first child port */ 177 reg = <0xe1404000 0x500>; 185 #size-cells = <0>; 186 port@0 { 187 reg = <0>; /* must be 0, first child port */
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/freebsd/sys/contrib/device-tree/Bindings/timer/ |
H A D | jcore,pit.txt | 22 reg = < 0x200 0x30 0x500 0x30 >; 23 interrupts = < 0x48 >;
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H A D | fsl,gtm.txt | 8 - reg : should contain gtm registers location and length (0x40). 16 reg = <0x500 0x40>; 20 clock-frequency = <0>; 25 reg = <0x440 0x40>; 29 clock-frequency = <0>;
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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | mvebu-sdram-controller.txt | 20 reg = <0x1400 0x500>;
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H A D | marvell,mvebu-sdram-controller.yaml | 30 reg = <0x1400 0x500>;
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
H A D | jcore,aic.txt | 23 reg = < 0x200 0x30 0x500 0x30 >;
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/freebsd/sys/contrib/device-tree/Bindings/arm/marvell/ |
H A D | mvebu-system-controller.txt | 17 reg = <0xd0018200 0x500>;
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/freebsd/sys/contrib/device-tree/src/arm64/intel/ |
H A D | socfpga_agilex5.dtsi | 23 service_reserved: svcbuffer@0 { 25 reg = <0x0 0x80000000 0x0 0x2000000>; 26 alignment = <0x1000>; 33 #size-cells = <0>; 35 cpu0: cpu@0 { 37 reg = <0x0>; 44 reg = <0x100>; 51 reg = <0x200>; 58 reg = <0x300>; 71 reg = <0x0 0x1d000000 0 0x10000>, [all …]
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/freebsd/sys/contrib/device-tree/Bindings/sound/ |
H A D | amlogic,axg-tdm-formatters.txt | 27 reg = <0x0 0x500 0x0 0x40>;
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/freebsd/sys/contrib/device-tree/Bindings/nvmem/ |
H A D | apple,efuses.yaml | 42 reg = <0x3d2bc000 0x1000>; 47 reg = <0x500 0x8>;
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | dm816x-clocks.dtsi | 7 reg = <0x400 0x40>; 23 reg = <0x440 0x30>; 35 reg = <0x470 0x30>; 46 reg = <0x4a0 0x30>; 59 #clock-cells = <0>; 65 #clock-cells = <0>; 71 #clock-cells = <0>; 77 #clock-cells = <0>; 83 /* 0x48180000 */ 86 #clock-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx51-pinfunc.h | 13 #define MX51_PAD_EIM_D16__AUD4_RXFS 0x05c 0x3f0 0x000 0x5 0x0 14 #define MX51_PAD_EIM_D16__AUD5_TXD 0x05c 0x3f0 0x8d8 0x7 0x0 15 #define MX51_PAD_EIM_D16__EIM_D16 0x05c 0x3f0 0x000 0x0 0x0 16 #define MX51_PAD_EIM_D16__GPIO2_0 0x05c 0x3f0 0x000 0x1 0x0 17 #define MX51_PAD_EIM_D16__I2C1_SDA 0x05c 0x3f0 0x9b4 0x4 0x0 18 #define MX51_PAD_EIM_D16__UART2_CTS 0x05c 0x3f0 0x000 0x3 0x0 19 #define MX51_PAD_EIM_D16__USBH2_DATA0 0x05c 0x3f0 0x000 0x2 0x0 20 #define MX51_PAD_EIM_D17__AUD5_RXD 0x060 0x3f4 0x8d4 0x7 0x0 21 #define MX51_PAD_EIM_D17__EIM_D17 0x060 0x3f4 0x000 0x0 0x0 22 #define MX51_PAD_EIM_D17__GPIO2_1 0x060 0x3f4 0x000 0x1 0x0 [all …]
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/freebsd/sys/contrib/device-tree/include/dt-bindings/reset/ |
H A D | hisi,hi6220-resets.h | 9 #define PERIPH_RSTDIS0_MMC0 0x000 10 #define PERIPH_RSTDIS0_MMC1 0x001 11 #define PERIPH_RSTDIS0_MMC2 0x002 12 #define PERIPH_RSTDIS0_NANDC 0x003 13 #define PERIPH_RSTDIS0_USBOTG_BUS 0x004 14 #define PERIPH_RSTDIS0_POR_PICOPHY 0x005 15 #define PERIPH_RSTDIS0_USBOTG 0x006 16 #define PERIPH_RSTDIS0_USBOTG_32K 0x007 17 #define PERIPH_RSTDIS1_HIFI 0x100 18 #define PERIPH_RSTDIS1_DIGACODEC 0x105 [all …]
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/freebsd/sys/contrib/device-tree/Bindings/thermal/ |
H A D | nvidia,tegra30-tsensor.yaml | 64 reg = <0x70014000 0x500>; 65 interrupts = <0 102 4>;
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