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/linux/arch/arm/boot/dts/st/
H A Dstm32mp133.dtsi13 reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
20 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
26 reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
33 bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
42 reg = <0x48003000 0x400>;
49 #size-cells = <0>;
53 adc1: adc@0 {
57 #size-cells = <0>;
58 reg = <0x0>;
60 interrupts = <0>;
[all …]
H A Dstm32mp151.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
22 reg = <0>;
42 reg = <0xa0021000 0x1000>,
43 <0xa0022000 0x2000>;
58 #clock-cells = <0>;
64 #clock-cells = <0>;
70 #clock-cells = <0>;
76 #clock-cells = <0>;
82 #clock-cells = <0>;
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dst,stm32-adc.yaml96 const: 0
234 "^adc@[0-9]+$":
251 - 0x0: ADC1
252 - 0x100: ADC2
253 - 0x200: ADC3 (stm32f4 only)
263 const: 0
268 - 0 for adc@0 (single adc for stm32mp13)
295 - 16 channels, numbered from 0 to 15 (for in0..in15) on stm32f4
296 - 19 channels, numbered from 0 to 18 (for in0..in18) on stm32mp13.
297 - 20 channels, numbered from 0 to 19 (for in0..in19) on stm32h7 and
[all …]