/freebsd/sys/contrib/device-tree/Bindings/pci/ |
H A D | faraday,ftpci100.txt | 9 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday 10 Technology) and product ID 0x4321. 23 - bus-range: set to <0x00 0xff> 45 - #address-cells: set to <0> 64 interrupt-map-mask = <0xf800 0 0 7>; 66 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */ 67 <0x4800 0 0 2 &pci_intc 1>, 68 <0x4800 0 0 3 &pci_intc 2>, 69 <0x4800 0 0 4 &pci_intc 3>, 70 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */ [all …]
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H A D | faraday,ftpci100.yaml | 18 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday 19 Technology) and product ID 0x4321. 34 interrupt-map-mask = <0xf800 0 0 7>; 36 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */ 37 <0x4800 0 0 2 &pci_intc 1>, 38 <0x4800 0 0 3 &pci_intc 2>, 39 <0x4800 0 0 4 &pci_intc 3>, 40 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */ 41 <0x5000 0 0 2 &pci_intc 2>, 42 <0x5000 0 0 3 &pci_intc 3>, [all …]
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H A D | v3-v360epc-pci.txt | 18 each be exactly 256MB (0x10000000) in size. 38 reg = <0x62000000 0x10000>, <0x61000000 0x01000000>; 42 bus-range = <0x00 0xff>; 43 ranges = 0x01000000 0 0x00000000 /* I/O space @00000000 */ 44 0x60000000 0 0x01000000 /* 16 MiB @ LB 60000000 */ 45 0x02000000 0 0x40000000 /* non-prefectable memory @40000000 */ 46 0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */ 47 0x42000000 0 0x50000000 /* prefetchable memory @50000000 */ 48 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */ 49 dma-ranges = <0x02000000 0 0x20000000 /* EBI memory space */ [all …]
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H A D | mvebu-pci.txt | 23 0x82000000 0 r MBUS_ID(0xf0, 0x01) r 0 s 32 registers area. This range entry translates the '0x82000000 0 r' PCI 33 address into the 'MBUS_ID(0xf0, 0x01) r' CPU address, which is part 34 of the internal register window (as identified by MBUS_ID(0xf0, 35 0x01)). 39 0x8t000000 s 0 MBUS_ID(w, a) 0 1 0 79 value is 0. 99 bus-range = <0x00 0xff>; 103 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */ 104 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */ [all …]
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/freebsd/sys/contrib/device-tree/src/arm/arm/ |
H A D | integratorap.dts | 17 #size-cells = <0>; 19 cpu@0 { 28 reg = <0>; 37 operating-points = <71000 0 38 66000 0 39 60000 0 40 48000 0 41 36000 0 42 24000 0 43 12000 0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/gemini/ |
H A D | gemini.dtsi | 23 pinctrl-0 = <&pflash_default_pins>; 31 reg = <0x40000000 0x1000>; 39 offset = <0x0c>; 41 mask = <0xC0000000>; 49 pinctrl-0 = <&dram_default_pins>, <&system_default_pins>, 159 reg = <0x41000000 0x1000>; 168 reg = <0x42000000 0x100>; 173 pinctrl-0 = <&uart_default_pins>; 179 reg = <0x43000000 0x1000>; 193 reg = <0x45000000 0x100>; [all …]
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/freebsd/stand/i386/common/ |
H A D | drv.c | 34 v86.addr = 0x13; in drvsize() 35 v86.eax = 0x4800; in drvsize() 41 printf("error %u\n", v86.eax >> 8 & 0xff); in drvsize() 42 return (0); in drvsize() 52 static unsigned c = 0x2d5c7c2f; in drvread() 62 v86.addr = 0x13; in drvread() 63 v86.eax = 0x4200; in drvread() 70 BOOTPROG, v86.eax >> 8 & 0xff, lba); in drvread() 73 return (0); in drvread() 87 v86.addr = 0x13; in drvwrite() [all …]
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/freebsd/sys/contrib/device-tree/src/arm/amazon/ |
H A D | alpine.dtsi | 37 reg = <0 0 0 0>; 43 #size-cells = <0>; 46 cpu@0 { 49 reg = <0>; 97 #size-cells = <0>; 98 #address-cells = <0>; 100 reg = <0x [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/amd/ |
H A D | elba.dtsi | 20 #clock-cells = <0>; 25 #clock-cells = <0>; 30 #clock-cells = <0>; 35 #clock-cells = <0>; 64 reg = <0x0 0x400 0x0 0x100>; 67 #size-cells = <0>; 75 reg = <0x0 0x1400 0x0 0x100>; 83 reg = <0x0 0x2400 0x0 0x400>, 84 <0x0 0x7fff0000 0x0 0x1000>; 86 #size-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/al/ |
H A D | alpine-v2.dtsi | 47 #size-cells = <0>; 49 cpu@0 { 52 reg = <0x0 0x0>; 59 reg = <0x0 0x1>; 66 reg = <0x0 0x2>; 73 reg = <0x0 0x3>; 81 cpu_suspend = <0x84000001>; 82 cpu_off = <0x84000002>; 83 cpu_on = <0x84000003>; 88 #clock-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/amazon/ |
H A D | alpine-v2.dtsi | 48 #size-cells = <0>; 50 cpu@0 { 53 reg = <0x0 0x0>; 60 reg = <0x0 0x1>; 67 reg = <0x0 0x2>; 74 reg = <0x0 0x3>; 82 cpu_suspend = <0x84000001>; 83 cpu_off = <0x84000002>; 84 cpu_on = <0x84000003>; 89 #clock-cells = <0>; [all …]
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H A D | alpine-v3.dtsi | 21 #size-cells = <0>; 23 cpu@0 { 26 reg = <0x0>; 28 d-cache-size = <0x8000>; 31 i-cache-size = <0xc000>; 40 reg = <0x1>; 42 d-cache-size = <0x8000>; 45 i-cache-size = <0xc000>; 54 reg = <0x2>; 56 d-cache-size = <0x8000>; [all …]
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/freebsd/sys/contrib/device-tree/src/mips/loongson/ |
H A D | loongson64-2k1000.dtsi | 15 #size-cells = <0>; 17 cpu0: cpu@0 { 20 reg = <0x0>; 27 #clock-cells = <0>; 33 #address-cells = <0>; 43 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */ 44 0 0x40000000 0 0x40000000 0 0x40000000 45 0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>; 51 ranges = <1 0x0 0x0 0x18000000 0x4000>; 56 reg = <0 0x1fe07000 0 0x422>; [all …]
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H A D | ls7a-pch.dtsi | 8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */ 9 0 0x20000000 0 0x2000000 [all...] |
/freebsd/sys/dts/arm/ |
H A D | annapurna-alpine.dts | 41 #size-cells = <0>; 43 cpu@0 { 46 reg = <0x0>; 49 d-cache-size = <0x8000>; // L1, 32K 50 i-cache-size = <0x8000>; // L1, 32K 51 timebase-frequency = <0>; 53 clock-frequency = <0>; 59 reg = <0x0>; 62 d-cache-size = <0x8000>; // L1, 32K 63 i-cache-size = <0x8000>; // L1, 32K [all …]
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/freebsd/stand/i386/pmbr/ |
H A D | pmbr.S | 36 .set LOAD,0x7c00 # Load address 37 .set EXEC,0x600 # Execution address 38 .set MAGIC,0xaa55 # Magic: bootable 39 .set SECSIZE,0x200 # Size of a single disk sector 43 .set GPT_SIG,0 44 .set GPT_SIG_0,0x20494645 # "EFI " 45 .set GPT_SIG_1,0x54524150 # "PART" 51 .set PART_TYPE,0 55 .set DPBUF_SEC,0x10 # Number of sectors 57 .set NHRDRV,0x475 # Number of hard drives [all …]
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/freebsd/sys/contrib/device-tree/src/loongarch/ |
H A D | loongson-2k2000.dtsi | 17 #size-cells = <0>; 22 reg = <0x0>; 29 reg = <0x1>; 36 #clock-cells = <0>; 51 thermal-sensors = <&tsensor 0>; 71 ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>, 72 <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>, 73 <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>, 74 <0xfe 0x0 0xfe 0x0 0x0 0x40000000>; 82 ranges = <1 0x0 0x0 0x18400000 0x4000>; [all …]
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H A D | loongson-2k1000.dtsi | 18 #size-cells = <0>; 20 cpu0: cpu@0 { 23 reg= <0x0>; 30 reg = <0x1>; 37 #clock-cells = <0>; 49 i2c-gpio-0 { 51 scl-gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 55 #size-cells = <0>; 66 #size-cells = <0>; 74 thermal-sensors = <&tsensor 0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | armada-xp-mv78260.dtsi | 27 #size-cells = <0>; 30 cpu@0 { 33 reg = <0>; 34 clocks = <&cpuclk 0>; 49 * MV78260 has 3 PCIe units Gen2.0: Two units can be 62 bus-range = <0x00 0xff>; 65 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */ 66 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */ 67 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */ 68 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */ [all …]
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H A D | armada-xp-mv78460.dtsi | 28 #size-cells = <0>; 31 cpu@0 { 34 reg = <0>; 35 clocks = <&cpuclk 0>; 66 * MV78460 has 4 PCIe units Gen2.0: Two units can be 79 bus-range = <0x00 0xff>; 82 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */ 83 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */ 84 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */ 85 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */ [all …]
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/freebsd/sys/dev/bxe/ |
H A D | 57710_int_offsets.h | 31 { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_SIZE 32 { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_SB_DATA_SIZE 33 { 0x28, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_SIZE 34 { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_SP_SB_DATA_SIZE 35 { 0x40, 0x0, 0x0, 0x0, 0x0}, // COMMON_DYNAMIC_HC_CONFIG_SIZE 36 { 0x10, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_MSG_SIZE 37 { 0x8, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_ASSERT_INDEX_SIZE 38 { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_ASM_INVALID_ASSERT_OPCODE 39 { 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_RAM1_TEST_EVENT_ID 40 …{ 0x0, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_EVEN… [all …]
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/freebsd/sys/dev/xl/ |
H A D | if_xlreg.h | 35 #define XL_EE_READ 0x0080 /* read, 5 bit address */ 36 #define XL_EE_WRITE 0x0040 /* write, 5 bit address */ 37 #define XL_EE_ERASE 0x00c0 /* erase, 5 bit address */ 38 #define XL_EE_EWEN 0x0030 /* erase, no data needed */ 39 #define XL_EE_8BIT_READ 0x0200 /* read, 8 bit address */ 40 #define XL_EE_BUSY 0x8000 42 #define XL_EE_EADDR0 0x00 /* station address, first word */ 43 #define XL_EE_EADDR1 0x01 /* station address, next word, */ 44 #define XL_EE_EADDR2 0x02 /* station address, last word */ 45 #define XL_EE_PRODID 0x03 /* product ID code */ [all …]
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/freebsd/sys/dev/flash/ |
H A D | mx25l.c | 57 #define FL_NONE 0x00 58 #define FL_ERASE_4K 0x01 59 #define FL_ERASE_32K 0x02 60 #define FL_ENABLE_4B_ADDR 0x04 61 #define FL_DISABLE_4B_ADDR 0x08 96 #define TSTATE_STOPPED 0 118 { "en25f32", 0x1c, 0x3116, 64 * 1024, 64, FL_NONE }, 119 { "en25p32", 0x1c, 0x2016, 64 * 1024, 64, FL_NONE }, 120 { "en25p64", 0x1c, 0x2017, 64 * 1024, 128, FL_NONE }, 121 { "en25q32", 0x1c, 0x3016, 64 * 1024, 64, FL_NONE }, [all …]
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/freebsd/sys/dev/cxgbe/ |
H A D | t4_vf.c | 71 {0x4800, "Chelsio T440-dbg VF"}, 72 {0x4801, "Chelsio T420-CR VF"}, 73 {0x4802, "Chelsio T422-CR VF"}, 74 {0x4803, "Chelsio T440-CR VF"}, 75 {0x4804, "Chelsio T420-BCH VF"}, 76 {0x4805, "Chelsio T440-BCH VF"}, 77 {0x4806, "Chelsio T440-CH VF"}, 78 {0x4807, "Chelsio T420-SO VF"}, 79 {0x4808, "Chelsio T420-CX VF"}, 80 {0x4809, "Chelsio T420-BT VF"}, [all …]
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/freebsd/stand/i386/libi386/ |
H A D | biosdisk.c | 52 #define BIOS_NUMDRIVES 0x475 56 #define DT_ATAPI 0x10 /* disk type for ATAPI floppies */ 57 #define WDMAJOR 0 /* major numbers for devices we frontend for */ 67 #define CMD_RESET 0x0000 68 #define CMD_READ_CHS 0x0200 69 #define CMD_WRITE_CHS 0x0300 70 #define CMD_READ_PARAM 0x0800 71 #define CMD_DRIVE_TYPE 0x1500 72 #define CMD_CHECK_EDD 0x4100 73 #define CMD_READ_LBA 0x4200 [all …]
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