Searched +full:0 +full:x43f00000 (Results 1 – 6 of 6) sorted by relevance
45 implementation defined. Some SoCs can use 0x00000000-0x0fffffff and46 0x40000000-0x4fffffff, while other SoCs only 0x40000000-0x4fffffff.53 bank 0 to 0x42000000-0x43ffffff, bank 5 to 0x46000000-0x46ffffff55 bank 0 to 0x48000000-0x49ffffff, bank 5 to 0x44000000-0x44ffffff61 "^.*@[1-5],[1-9a-f][0-9a-f]+$":77 // - the Ethernet device is connected at the offset 0x01f00000 of CS1 and78 // mapped to 0x43f00000 of the parent bus.79 // - the UART device is connected at the offset 0x00200000 of CS5 and80 // mapped to 0x46200000 of the parent bus.84 reg = <0x58c00000 0x400>;[all …]
47 #size-cells = <0>;49 cpu@0 {52 reg = <0>;60 reg = <0x68000000 0x8000000>;66 #clock-cells = <0>;73 #phy-cells = <0>;78 #phy-cells = <0>;92 reg = <0x43f00000 [all...]
35 #size-cells = <0>;37 cpu@0 {40 reg = <0>;48 reg = <0x68000000 0x100000>;60 reg = <0x1fffc000 0x4000>;63 ranges = <0 0x1fffc000 0x4000>;70 reg = <0x43f00000 0x100000>;75 reg = <0x43f80000 0x4000>;79 #size-cells = <0>;85 reg = <0x43f84000 0x4000>;[all …]
39 #size-cells = <0>;41 cpu@0 {44 reg = <0>;52 reg = <0x68000000 0x10000000>;64 reg = <0x30000000 0x1000>;73 reg = <0x43f00000 0x100000>;78 #size-cells = <0>;80 reg = <0x43f80000 0x4000>;89 #size-cells = <0>;91 reg = <0x43f84000 0x4000>;[all …]
23 * 1. (anything) ** 0 is 126 * 4. NAN ** (anything except 0) is NAN28 * 6. +-(|x| > 1) ** -INF is +029 * 7. +-(|x| < 1) ** +INF is +032 * 10. +0 ** (+anything except 0, NAN) is +033 * 11. -0 ** (+anything except 0, NAN, odd integer) is +0[all...]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]