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Searched +full:0 +full:x41c00000 (Results 1 – 13 of 13) sorted by relevance

/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65.dtsi54 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
57 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
58 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
59 <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* MSMC SRAM */
60 <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
62 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
63 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
64 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
[all …]
H A Dk3-j721s2.dtsi29 #size-cells = <0>;
42 cpu0: cpu@0 {
44 reg = <0x000>;
47 i-cache-size = <0xc000>;
50 d-cache-size = <0x8000>;
58 reg = <0x001>;
61 i-cache-size = <0xc000>;
64 d-cache-size = <0x8000>;
75 cache-size = <0x100000>;
118 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
H A Dk3-j7200.dtsi25 #size-cells = <0>;
39 cpu0: cpu@0 {
41 reg = <0x000>;
44 i-cache-size = <0xc000>;
47 d-cache-size = <0x8000>;
55 reg = <0x001>;
58 i-cache-size = <0xc000>;
61 d-cache-size = <0x8000>;
72 cache-size = <0x100000>;
113 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
H A Dk3-j721e.dtsi25 #size-cells = <0>;
39 cpu0: cpu@0 {
41 reg = <0x000>;
44 i-cache-size = <0xC000>;
47 d-cache-size = <0x8000>;
55 reg = <0x001>;
58 i-cache-size = <0xC000>;
61 d-cache-size = <0x8000>;
72 cache-size = <0x100000>;
114 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
H A Dk3-j784s4.dtsi26 #size-cells = <0>;
65 cpu0: cpu@0 {
67 reg = <0x000>;
70 i-cache-size = <0xc000>;
73 d-cache-size = <0x8000>;
81 reg = <0x001>;
84 i-cache-size = <0xc000>;
87 d-cache-size = <0x8000>;
95 reg = <0x002>;
98 i-cache-size = <0xc000>;
[all …]
H A Dk3-am65-mcu.dtsi13 ranges = <0x0 0x0 0x40f00000 0x20000>;
17 reg = <0x200 0x8>;
22 reg = <0x4040 0x4>;
30 reg = <0x0 0x40f04200 0x0 0x10>;
33 pinctrl-single,function-mask = <0x00000101>;
39 reg = <0x0 0x40f04280 0x0 0x8>;
42 pinctrl-single,function-mask = <0x00000003>;
47 reg = <0x00 0x40a00000 0x00 0x100>;
56 reg = <0x00 0x41c00000 0x00 0x80000>;
57 ranges = <0x0 0x00 0x41c00000 0x80000>;
[all …]
H A Dk3-j721e-mcu-wakeup.dtsi19 reg = <0x00 0x44083000 0x0 0x1000>;
41 ranges = <0x0 0x0 0x40f00000 0x20000>;
45 reg = <0x200 0x8>;
50 reg = <0x4040 0x4>;
59 ranges = <0x0 0x00 0x43000000 0x20000>;
63 reg = <0x14 0x4>;
69 /* Proxy 0 addressing */
70 reg = <0x00 0x4301c000 0x00 0x178>;
73 pinctrl-single,function-mask = <0xffffffff>;
79 reg = <0x00 0x40f04200 0x00 0x28>;
[all …]
H A Dk3-j7200-mcu-wakeup.dtsi19 reg = <0x00 0x44083000 0x00 0x1000>;
40 reg = <0x00 0x40400000 0x00 0x400>;
53 reg = <0x00 0x40410000 0x00 0x400>;
57 assigned-clocks = <&k3_clks 71 1>, <&k3_clks 308 0>;
66 reg = <0x00 0x40420000 0x00 0x400>;
79 reg = <0x00 0x40430000 0x00 0x400>;
83 assigned-clocks = <&k3_clks 73 1>, <&k3_clks 309 0>;
92 reg = <0x00 0x40440000 0x00 0x400>;
105 reg = <0x00 0x40450000 0x00 0x400>;
109 assigned-clocks = <&k3_clks 75 1>, <&k3_clks 310 0>;
[all …]
H A Dk3-j784s4-mcu-wakeup.dtsi20 reg = <0x00 0x44083000 0x00 0x1000>;
46 ranges = <0x0 0x00 0x43000000 0x20000>;
51 reg = <0x14 0x4>;
59 reg = <0x00 0x43600000 0x00 0x10000>,
60 <0x00 0x44880000 0x00 0x20000>,
61 <0x00 0x44860000 0x00 0x20000>;
72 reg = <0x00 0x41c00000 0x00 0x100000>;
73 ranges = <0x00 0x00 0x41c00000 0x100000>;
80 /* Proxy 0 addressing */
81 reg = <0x00 0x4301c000 0x00 0x034>;
[all …]
H A Dk3-j721s2-mcu-wakeup.dtsi19 reg = <0x00 0x44083000 0x00 0x1000>;
41 ranges = <0x0 0x00 0x43000000 0x20000>;
45 reg = <0x14 0x4>;
53 reg = <0x00 0x43600000 0x00 0x10000>,
54 <0x00 0x44880000 0x00 0x20000>,
55 <0x00 0x44860000 0x00 0x20000>;
66 reg = <0x00 0x41c00000 0x00 0x100000>;
67 ranges = <0x00 0x00 0x41c00000 0x100000>;
74 /* Proxy 0 addressing */
75 reg = <0x00 0x4301c000 0x00 0x034>;
[all …]
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,k3-r5f-rproc.yaml72 It should be either a value of 1 (LockStep mode) or 0 (Split mode) on
76 It should be either a value of 0 (Split mode) or 2 (Single-CPU mode) and
103 either of them can be configured to appear at that R5F's address 0x0.
177 enum: [0, 1]
181 either a value of 1 (enabled) or 0 (disabled), default is disabled
186 enum: [0, 1]
190 either a value of 1 (enabled) or 0 (disabled), default is enabled if
195 enum: [0, 1]
198 address 0 (from core's view). Should be either a value of 1 (ATCM
199 at 0x0) or 0 (BTCM at 0x0), default value is 1 if omitted.
[all …]
/linux/sound/pci/mixart/
H A Dmixart_mixer.c24 0xc2c00000, /* [000] -96.0 dB */
25 0xc2bf0000, /* [001] -95.5 dB */
26 0xc2be0000, /* [002] -95.0 dB */
27 0xc2bd0000, /* [003] -94.5 dB */
28 0xc2bc0000, /* [004] -94.0 dB */
29 0xc2bb0000, /* [005] -93.5 dB */
30 0xc2ba0000, /* [006] -93.0 dB */
31 0xc2b90000, /* [007] -92.5 dB */
32 0xc2b80000, /* [008] -92.0 dB */
33 0xc2b70000, /* [009] -91.5 dB */
[all …]
/linux/sound/pci/hda/
H A Dpatch_ca0132.c37 #define FLOAT_ZERO 0x00000000
38 #define FLOAT_ONE 0x3f800000
39 #define FLOAT_TWO 0x40000000
40 #define FLOAT_THREE 0x40400000
41 #define FLOAT_FIVE 0x40a00000
42 #define FLOAT_SIX 0x40c00000
43 #define FLOAT_EIGHT 0x41000000
44 #define FLOAT_MINUS_5 0xc0a00000
46 #define UNSOL_TAG_DSP 0x16
55 #define MASTERCONTROL 0x80
[all …]