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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dbrcm,unimac-mdio.txt12 - #address-cells: must be 0
33 reg = <0x403c0 0x8 0x40300 0x18>;
36 #address-cells = <0>;
39 phy@0 {
41 reg = <0>;
H A Dbrcm,unimac-mdio.yaml25 - brcm,asp-v2.0-mdio
80 reg = <0x403c0 0x8>, <0x40300 0x18>;
83 #size-cells = <0>;
85 ethernet-phy@0 {
87 reg = <0>;
/freebsd/sys/dev/cxgbe/common/
H A Dt4_hw.c45 } while (0)
59 * at the time it indicated completion is stored there. Returns 0 if the
71 return 0; in t4_wait_op_done_val()
73 if (--attempts == 0) in t4_wait_op_done_val()
178 * Reset F_ENABLE to 0 so reads of PCIE_CFG_SPACE_DATA won't cause a in t4_hw_pci_read_cfg4()
180 * F_ENABLE is 0 so a simple register write is easier than a in t4_hw_pci_read_cfg4()
183 t4_write_reg(adap, A_PCIE_CFG_SPACE_REQ, 0); in t4_hw_pci_read_cfg4()
212 CH_ERR(adap, "firmware reports adapter error: %s (0x%08x)\n", in t4_report_fw_error()
272 for (i = 0; i < MAX_NCHAN; i++) { in read_tx_state()
273 if (sc->chan_map[i] != 0xf in read_tx_state()
[all...]
H A Dt4_regs.h36 #define MYPF_BASE 0x1b000
39 #define PF0_BASE 0x1e000
42 #define PF1_BASE 0x1e400
45 #define PF2_BASE 0x1e800
48 #define PF3_BASE 0x1ec00
51 #define PF4_BASE 0x1f000
54 #define PF5_BASE 0x1f400
57 #define PF6_BASE 0x1f800
60 #define PF7_BASE 0x1fc00
63 #define PF_STRIDE 0x40
[all...]
/freebsd/usr.sbin/cxgbetool/
H A Dreg_defs_t5.c5 { "SGE_PF_KDOORBELL", 0x1e000, 0 },
9 { "PIDX", 0, 13 },
10 { "SGE_PF_GTS", 0x1e004, 0 },
14 { "CIDXInc", 0, 12 },
15 { "SGE_PF_KTIMESTAMP_LO", 0x1e008, 0 },
16 { "SGE_PF_KTIMESTAMP_HI", 0x1e00c, 0 },
17 { "SGE_PF_KDOORBELL", 0x1e400, 0 },
21 { "PIDX", 0, 13 },
22 { "SGE_PF_GTS", 0x1e404, 0 },
26 { "CIDXInc", 0, 12 },
[all …]