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Searched +full:0 +full:x40018000 (Results 1 – 9 of 9) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Draspberrypi,rp1-clocks.yaml54 reg = <0xc0 0x40018000 0x0 0x10038>;
/linux/arch/arm64/boot/dts/broadcom/
H A Drp1-common.dtsi9 ranges = <0x00 0x40000000 0x01 0x00 0x00000000 0x00 0x00400000>;
10 dma-ranges = <0x10 0x00000000 0x43000000 0x10 0x00000000 0x10 0x00000000>;
16 reg = <0x00 0x40018000 0x0 0x10038>;
31 reg = <0x00 0x400d0000 0x0 0xc000>,
32 <0x00 0x400e0000 0x0 0xc000>,
33 <0x00 0x400f0000 0x0 0xc000>;
38 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>,
/linux/Documentation/devicetree/bindings/misc/
H A Dpci1de4,1.yaml36 - IO BANK0: 0
67 - USB HOST0-0: 31
72 - USB HOST1-0: 36
114 rp1@0,0 {
116 ranges = <0x01 0x00 0x00000000 0x82010000 0x00 0x00 0x00 0x400000>;
124 ranges = <0x00 0x40000000 0x01 0x00 0x00000000 0x00 0x00400000>;
125 dma-ranges = <0x10 0x00000000 0x43000000 0x10 0x00000000 0x10 0x00000000>;
131 reg = <0x00 0x40018000 0x0 0x10038>;
/linux/Documentation/devicetree/bindings/dma/
H A Dfsl,edma.yaml62 cell 0: index of dma channel mux instance.
66 cell 0: peripheral dma request id.
198 - pattern: "^ch(0[0-9]|[1-2][0-9]|3[01])$"
255 - const: tx-0-15
276 reg = <0x40018000 0x2000>,
277 <0x40024000 0x1000>,
278 <0x40025000 0x1000>;
279 interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,
280 <0 9 IRQ_TYPE_LEVEL_HIGH>;
294 reg = <0x40080000 0x2000>,
[all …]
/linux/arch/arm/boot/dts/nxp/lpc/
H A Dlpc32xx.dtsi20 #size-cells = <0>;
22 cpu@0 {
25 reg = <0x0>;
32 #clock-cells = <0>;
39 #clock-cells = <0>;
49 ranges = <0x00000000 0x00000000 0x10000000>,
50 <0x20000000 0x20000000 0x30000000>,
51 <0xe0000000 0xe0000000 0x04000000>;
55 reg = <0x08000000 0x20000>;
59 ranges = <0x00000000 0x08000000 0x20000>;
[all …]
/linux/arch/arm/mach-lpc32xx/
H A Dlpc32xx.h17 * AHB 0 physical base addresses
19 #define LPC32XX_SLC_BASE 0x20020000
20 #define LPC32XX_SSP0_BASE 0x20084000
21 #define LPC32XX_SPI1_BASE 0x20088000
22 #define LPC32XX_SSP1_BASE 0x2008C000
23 #define LPC32XX_SPI2_BASE 0x20090000
24 #define LPC32XX_I2S0_BASE 0x20094000
25 #define LPC32XX_SD_BASE 0x20098000
26 #define LPC32XX_I2S1_BASE 0x2009C000
27 #define LPC32XX_MLC_BASE 0x200A8000
[all …]
/linux/arch/arm/boot/dts/nxp/vf/
H A Dvfxxx.dtsi33 #clock-cells = <0>;
39 #clock-cells = <0>;
46 offset = <0x0>;
47 mask = <0x1000>;
66 reg = <0x40000000 0x00070000>;
71 reg = <0x40001000 0x800>;
76 reg = <0x40001800 0x400>;
85 reg = <0x40018000 0x2000>,
86 <0x40024000 0x1000>,
87 <0x40025000 0x1000>;
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp131.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
21 reg = <0>;
43 #size-cells = <0>;
44 linaro,optee-channel-id = <0>;
47 reg = <0x14>;
52 reg = <0x16>;
57 reg = <0x17>;
61 #size-cells = <0>;
63 scmi_reg11: regulator@0 {
[all …]
H A Dstm32mp151.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
22 reg = <0>;
42 reg = <0xa0021000 0x1000>,
43 <0xa0022000 0x2000>;
58 #clock-cells = <0>;
64 #clock-cells = <0>;
70 #clock-cells = <0>;
76 #clock-cells = <0>;
82 #clock-cells = <0>;
[all …]