Home
last modified time | relevance | path

Searched +full:0 +full:x4001 (Results 1 – 25 of 83) sorted by relevance

1234

/linux/sound/usb/
H A Dquirks.c42 for (quirk = quirk_comp->data; quirk->ifnum >= 0; ++quirk) { in create_composite_quirk()
50 if (err < 0) in create_composite_quirk()
54 for (quirk = quirk_comp->data; quirk->ifnum >= 0; ++quirk) { in create_composite_quirk()
62 if (err < 0) in create_composite_quirk()
67 return 0; in create_composite_quirk()
75 return 0; in ignore_interface_quirk()
84 return snd_usb_midi_v2_create(chip, intf, quirk, 0); in create_any_midi_quirk()
99 alts = &iface->altsetting[0]; in create_standard_audio_quirk()
102 if (err < 0) { in create_standard_audio_quirk()
108 usb_set_interface(chip->dev, altsd->bInterfaceNumber, 0); in create_standard_audio_quirk()
[all...]
/linux/arch/arm/nwfpe/
H A Dfpopcode.c19 { .high = 0x0000, .low = 0x0000000000000000ULL},/* extended 0.0 */
20 { .high = 0x3fff, .low = 0x8000000000000000ULL},/* extended 1.0 */
21 { .high = 0x4000, .low = 0x8000000000000000ULL},/* extended 2.0 */
22 { .high = 0x4000, .low = 0xc000000000000000ULL},/* extended 3.0 */
23 { .high = 0x4001, .low = 0x8000000000000000ULL},/* extended 4.0 */
24 { .high = 0x4001, .low = 0xa000000000000000ULL},/* extended 5.0 */
25 { .high = 0x3ffe, .low = 0x8000000000000000ULL},/* extended 0.5 */
26 { .high = 0x4002, .low = 0xa000000000000000ULL},/* extended 10.0 */
31 0x0000000000000000ULL, /* double 0.0 */
32 0x3ff0000000000000ULL, /* double 1.0 */
[all …]
/linux/tools/arch/x86/include/uapi/asm/
H A Dprctl.h
/linux/arch/x86/include/uapi/asm/
H A Dprctl.h5 #define ARCH_SET_GS 0x1001
6 #define ARCH_SET_FS 0x1002
7 #define ARCH_GET_FS 0x1003
8 #define ARCH_GET_GS 0x1004
10 #define ARCH_GET_CPUID 0x1011
11 #define ARCH_SET_CPUID 0x1012
13 #define ARCH_GET_XCOMP_SUPP 0x1021
14 #define ARCH_GET_XCOMP_PERM 0x1022
15 #define ARCH_REQ_XCOMP_PERM 0x1023
16 #define ARCH_GET_XCOMP_GUEST_PERM 0x1024
[all …]
/linux/tools/perf/trace/beauty/
H A Dx86_arch_prctl.sh25 print_range 1 0x1 0x1001
26 print_range 2 0x2 0x2001
27 print_range 3 0x4 0x4001
/linux/Documentation/devicetree/bindings/crypto/
H A Dti,sa2ul.yaml93 reg = <0x4e00000 0x1200>;
95 dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,
96 <&main_udmap 0x4001>;
/linux/drivers/media/rc/keymaps/
H A Drc-ct-90405.c5 * Copyright (C) 2021 Alexander Voronov <avv.0@ya.ru>
12 { 0x4014, KEY_SWITCHVIDEOMODE },
13 { 0x4012, KEY_POWER },
14 { 0x4044, KEY_TV },
15 { 0x40be43, KEY_3D_MODE },
16 { 0x400c, KEY_SUBTITLE },
17 { 0x4001, KEY_NUMERIC_1 },
18 { 0x4002, KEY_NUMERIC_2 },
19 { 0x4003, KEY_NUMERIC_3 },
20 { 0x4004, KEY_NUMERIC_4 },
[all …]
/linux/drivers/comedi/drivers/
H A Ddas08_cs.c58 dev->board_ptr = &das08_cs_boards[0]; in das08_cs_auto_attach()
64 iobase = link->resource[0]->start; in das08_cs_auto_attach()
86 PCMCIA_DEVICE_MANF_CARD(0x01c5, 0x4001),
/linux/include/linux/
H A DmISDNif.h43 * <16 bit 0 >
58 #define MISDN_CMDMASK 0xff00
59 #define MISDN_LAYERMASK 0x00ff
62 #define OPEN_CHANNEL 0x0100
63 #define CLOSE_CHANNEL 0x0200
64 #define CONTROL_CHANNEL 0x0300
65 #define CHECK_DATA 0x0400
68 #define PH_ACTIVATE_REQ 0x0101
69 #define PH_DEACTIVATE_REQ 0x0201
70 #define PH_DATA_REQ 0x2001
[all …]
/linux/drivers/dma/ti/
H A Dk3-psil-am654.c54 PSIL_SA2UL(0x4000, 0),
55 PSIL_SA2UL(0x4001, 0),
56 PSIL_SA2UL(0x4002, 0),
57 PSIL_SA2UL(0x4003, 0),
59 PSIL_ETHERNET(0x4100),
60 PSIL_ETHERNET(0x4101),
61 PSIL_ETHERNET(0x4102),
62 PSIL_ETHERNET(0x4103),
64 PSIL_ETHERNET(0x4200),
65 PSIL_ETHERNET(0x4201),
[all …]
H A Dk3-psil-am64.c66 PSIL_SAUL(0x4000, 17, 32, 8, 32, 0),
67 PSIL_SAUL(0x4001, 18, 32, 8, 33, 0),
68 PSIL_SAUL(0x4002, 19, 40, 8, 40, 0),
69 PSIL_SAUL(0x4003, 20, 40, 8, 41, 0),
71 PSIL_ETHERNET(0x4100, 21, 48, 16),
72 PSIL_ETHERNET(0x4101, 22, 64, 16),
73 PSIL_ETHERNET(0x4102, 23, 80, 16),
74 PSIL_ETHERNET(0x4103, 24, 96, 16),
76 PSIL_ETHERNET(0x4200, 25, 112, 16),
77 PSIL_ETHERNET(0x4201, 26, 128, 16),
[all …]
H A Dk3-psil-j721e.c72 PSIL_SA2UL(0x4000, 0),
73 PSIL_SA2UL(0x4001, 0),
74 PSIL_SA2UL(0x4002, 0),
75 PSIL_SA2UL(0x4003, 0),
77 PSIL_ETHERNET(0x4100),
78 PSIL_ETHERNET(0x4101),
79 PSIL_ETHERNET(0x4102),
80 PSIL_ETHERNET(0x4103),
82 PSIL_ETHERNET(0x4200),
83 PSIL_ETHERNET(0x4201),
[all …]
/linux/drivers/gpu/drm/xe/abi/
H A Dguc_klvs_abi.h17 * | 0 | 31:16 | **KEY** - KLV key identifier |
25 * | | 15:0 | **LEN** - length of VALUE (in 32bit dwords) |
27 * | 1 | 31:0 | **VALUE** - actual value of the KLV (format depends on KEY) |
31 * | n | 31:0 | |
36 #define GUC_KLV_0_KEY (0xffffu << 16)
37 #define GUC_KLV_0_LEN (0xffffu << 0)
38 #define GUC_KLV_n_VALUE (0xffffffffu << 0)
45 * _`GUC_KLV_GLOBAL_CFG_GMD_ID` : 0x3000
51 #define GUC_KLV_GLOBAL_CFG_GMD_ID_KEY 0x3000u
59 * _`GUC_KLV_SELF_CFG_MEMIRQ_STATUS_ADDR` : 0x0900
[all …]
/linux/drivers/ufs/host/
H A Dufs-renesas.c39 ufshcd_dump_regs(hba, 0xc0, 0x40, "regs: 0xc0 + "); in ufs_renesas_dbg_register_dump()
67 ufs_renesas_write(hba, 0xd0, data_d0); in ufs_renesas_write_d0_d4()
68 ufs_renesas_write(hba, 0xd4, data_d4); in ufs_renesas_write_d0_d4()
74 ufs_renesas_write_d0_d4(hba, 0x0000080c, 0x00000100); in ufs_renesas_write_800_80c_poll()
75 ufs_renesas_write_d0_d4(hba, 0x00000800, (data_800 << 16) | BIT(8) | addr); in ufs_renesas_write_800_80c_poll()
76 ufs_renesas_write(hba, 0xd0, 0x0000080c); in ufs_renesas_write_800_80c_poll()
77 ufs_renesas_poll(hba, 0xd4, BIT(8), BIT(8)); in ufs_renesas_write_800_80c_poll()
82 ufs_renesas_write_d0_d4(hba, 0x0000080c, 0x00000100); in ufs_renesas_write_804_80c_poll()
83 ufs_renesas_write_d0_d4(hba, 0x00000804, (data_804 << 16) | BIT(8) | addr); in ufs_renesas_write_804_80c_poll()
84 ufs_renesas_write(hba, 0xd0, 0x0000080c); in ufs_renesas_write_804_80c_poll()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/
H A Dhub.fuc30 gpc_count: .b32 0
31 rop_count: .b32 0
34 ctx_current: .b32 0
38 chan_mmio_count: .b32 0
39 chan_mmio_address: .b32 0
45 .b32 0x0417e91c // 0x17e91c, 2
55 nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_VAL(5), 0, $r15)
57 nv_iowr(NV_PGRAPH_FECS_INTR_UP_SET, 0, $r15)
64 // CC_SCRATCH[0]:
67 // 31:0: total PGRAPH context size
[all …]
/linux/arch/sh/kernel/cpu/sh4/
H A Dprobe.c28 pvr = (__raw_readl(CCN_PVR) >> 8) & 0xffffff; in cpu_probe()
29 prr = (__raw_readl(CCN_PRR) >> 4) & 0xff; in cpu_probe()
56 if (((pvr >> 16) & 0xff) == 0x10) { in cpu_probe()
59 if ((cvr & 0x10000000) == 0) { in cpu_probe()
65 boot_cpu_data.cut_major = pvr & 0x7f; in cpu_probe()
76 if ((cvr & 0x20000000)) in cpu_probe()
80 pvr &= 0xffff; in cpu_probe()
87 case 0x205: in cpu_probe()
92 case 0x206: in cpu_probe()
97 case 0x1100: in cpu_probe()
[all …]
/linux/include/ufs/
H A Dunipro.h12 #define TX_HIBERN8TIME_CAPABILITY 0x000F
13 #define TX_MODE 0x0021
14 #define TX_HSRATE_SERIES 0x0022
15 #define TX_HSGEAR 0x0023
16 #define TX_PWMGEAR 0x0024
17 #define TX_AMPLITUDE 0x0025
18 #define TX_HS_SLEWRATE 0x0026
19 #define TX_SYNC_SOURCE 0x0027
20 #define TX_HS_SYNC_LENGTH 0x0028
21 #define TX_HS_PREPARE_LENGTH 0x0029
[all …]
/linux/tools/include/perf/
H A Darm_pmuv3.h18 #define ARMV8_PMUV3_PERFCTR_SW_INCR 0x0000
19 #define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL 0x0001
20 #define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL 0x0002
21 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x0003
22 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x0004
23 #define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL 0x0005
24 #define ARMV8_PMUV3_PERFCTR_LD_RETIRED 0x0006
25 #define ARMV8_PMUV3_PERFCTR_ST_RETIRED 0x0007
26 #define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x0008
27 #define ARMV8_PMUV3_PERFCTR_EXC_TAKEN 0x0009
[all …]
/linux/include/linux/perf/
H A Darm_pmuv3.h16 #define ARMV8_PMUV3_PERFCTR_SW_INCR 0x0000
17 #define ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL 0x0001
18 #define ARMV8_PMUV3_PERFCTR_L1I_TLB_REFILL 0x0002
19 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x0003
20 #define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x0004
21 #define ARMV8_PMUV3_PERFCTR_L1D_TLB_REFILL 0x0005
22 #define ARMV8_PMUV3_PERFCTR_LD_RETIRED 0x0006
23 #define ARMV8_PMUV3_PERFCTR_ST_RETIRED 0x0007
24 #define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x0008
25 #define ARMV8_PMUV3_PERFCTR_EXC_TAKEN 0x0009
[all …]
/linux/drivers/net/usb/
H A Dpegasus.h9 #define PEGASUS_II 0x80000000
10 #define HAS_HOME_PNA 0x40000000
14 #define EPROM_WRITE 0x01
15 #define EPROM_READ 0x02
16 #define EPROM_DONE 0x04
17 #define EPROM_WR_ENABLE 0x10
18 #define EPROM_LOAD 0x20
20 #define PHY_DONE 0x80
21 #define PHY_READ 0x40
22 #define PHY_WRITE 0x20
[all …]
/linux/drivers/phy/cadence/
H A Dphy-cadence-salvo.c19 #define USB3_PHY_OFFSET 0x0
20 #define USB2_PHY_OFFSET 0x38000
22 #define PHY_PMA_CMN_CTRL1 0xC800
23 #define TB_ADDR_CMN_DIAG_HSCLK_SEL 0x01e0
24 #define TB_ADDR_CMN_PLL0_VCOCAL_INIT_TMR 0x0084
25 #define TB_ADDR_CMN_PLL0_VCOCAL_ITER_TMR 0x0085
26 #define TB_ADDR_CMN_PLL0_INTDIV 0x0094
27 #define TB_ADDR_CMN_PLL0_FRACDIV 0x0095
28 #define TB_ADDR_CMN_PLL0_HIGH_THR 0x0096
29 #define TB_ADDR_CMN_PLL0_SS_CTRL1 0x0098
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4_pci_id_tbl.h46 * -- The PCI Function Number to use in the PCI Device ID Table. "0"
73 /* T4 and later ASICs use a PCI Device ID scheme of 0xVFPP where:
76 * F = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs
97 CH_PCI_ID_TABLE_FENTRY(0x4000), /* T440-dbg */
98 CH_PCI_ID_TABLE_FENTRY(0x4001), /* T420-cr */
99 CH_PCI_ID_TABLE_FENTRY(0x4002), /* T422-cr */
100 CH_PCI_ID_TABLE_FENTRY(0x4003), /* T440-cr */
101 CH_PCI_ID_TABLE_FENTRY(0x4004), /* T420-bch */
102 CH_PCI_ID_TABLE_FENTRY(0x4005), /* T440-bch */
103 CH_PCI_ID_TABLE_FENTRY(0x4006), /* T440-ch */
[all …]
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-pinfunc.h13 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000
14 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010
15 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020
16 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030
17 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040
18 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050
19 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060
20 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070
21 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
22 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
[all …]
/linux/include/uapi/linux/
H A Dmedia.h48 #define MEDIA_ENT_F_BASE 0x00000000
49 #define MEDIA_ENT_F_OLD_BASE 0x00010000
50 #define MEDIA_ENT_F_OLD_SUBDEV_BASE 0x00020000
68 #define MEDIA_ENT_F_DTV_DEMOD (MEDIA_ENT_F_BASE + 0x00001)
69 #define MEDIA_ENT_F_TS_DEMUX (MEDIA_ENT_F_BASE + 0x00002)
70 #define MEDIA_ENT_F_DTV_CA (MEDIA_ENT_F_BASE + 0x00003)
71 #define MEDIA_ENT_F_DTV_NET_DECAP (MEDIA_ENT_F_BASE + 0x00004)
77 #define MEDIA_ENT_F_IO_DTV (MEDIA_ENT_F_BASE + 0x01001)
78 #define MEDIA_ENT_F_IO_VBI (MEDIA_ENT_F_BASE + 0x01002)
79 #define MEDIA_ENT_F_IO_SWRADIO (MEDIA_ENT_F_BASE + 0x01003)
[all …]
/linux/include/linux/mfd/wm831x/
H A Dcore.h25 #define WM831X_RESET_ID 0x00
26 #define WM831X_REVISION 0x01
27 #define WM831X_PARENT_ID 0x4000
28 #define WM831X_SYSVDD_CONTROL 0x4001
29 #define WM831X_THERMAL_MONITORING 0x4002
30 #define WM831X_POWER_STATE 0x4003
31 #define WM831X_WATCHDOG 0x4004
32 #define WM831X_ON_PIN_CONTROL 0x4005
33 #define WM831X_RESET_CONTROL 0x4006
34 #define WM831X_CONTROL_INTERFACE 0x4007
[all …]

1234