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/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dti,am654-hbmc.txt23 reg = <0x0 0x47000000 0x0 0x100>;
31 mux-reg-masks = <0x4 0x2>; /* 0: reg 0x4, bit 1 */
37 reg = <0x0 0x47034000 0x0 0x100>,
38 <0x5 0x00000000 0x1 0x0000000>;
42 ranges = <0x0 0x0 0x5 0x00000000 0x4000000>, /* CS0 - 64MB */
43 <0x1 0x0 0x5 0x04000000 0x4000000>; /* CS1 - 64MB */
44 mux-controls = <&hbmc_mux 0>;
47 flash@0,0 {
49 reg = <0x0 0x0 0x4000000>;
H A Dti,am654-hbmc.yaml31 "^flash@[0-1],[0-9a-f]+$":
54 reg = <0x0 0x47034000 0x0 0x100>,
55 <0x5 0x00000000 0x1 0x0000000>;
56 ranges = <0x0 0x0 0x5 0x00000000 0x4000000>, /* CS0 - 64MB */
57 <0x1 0x0 0x5 0x04000000 0x4000000>; /* CS1 - 64MB */
58 clocks = <&k3_clks 102 0>;
62 mux-controls = <&hbmc_mux 0>;
64 flash@0,0 {
66 reg = <0x0 0x0 0x4000000>;
H A Dmxicy,nand-ecc-engine.yaml36 reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>;
38 clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>;
41 #size-cells = <0>;
43 flash@0 {
45 reg = <0>;
52 reg = <0x43c40000 0x10000>;
59 reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>;
61 clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>;
64 #size-cells = <0>;
67 flash@0 {
[all …]
H A Dqcom_nandc.txt39 - #size-cells: <0>
49 number (e.g., 0, 1, 2, etc.)
67 reg = <0x1ac00000 0x800>;
79 #size-cells = <0>;
81 nand@0 {
82 reg = <0>;
92 partition@0 {
94 reg = <0 0x58a0000>;
99 reg = <0x58a0000 0x4000000>;
107 reg = <0x79b0000 0x1000>;
[all …]
H A Dqcom,nandc.yaml143 reg = <0x1ac00000 0x800>;
155 #size-cells = <0>;
157 nand@0 {
158 reg = <0>;
163 qcom,boot-partitions = <0x0 0x58a0000>;
170 partition@0 {
172 reg = <0 0x58a0000>;
177 reg = <0x58a0000 0x4000000>;
186 reg = <0x79b0000 0x1000>;
192 dmas = <&qpicbam 0>,
[all …]
H A Dcypress,hyperflash.txt10 flash@0 {
12 reg = <0x0 0x4000000>;
H A Darm-versatile.txt24 reg = <0x34000000 0x4000000>;
/freebsd/sys/contrib/device-tree/src/mips/ingenic/
H A Djz4740.dtsi12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-mxu1.0";
17 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10001000 0x14>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
55 reg = <0x10000000 0x100>;
65 reg = <0x10002000 0x1000>;
[all …]
H A Djz4725b.dtsi12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-mxu1.0";
17 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10001000 0x14>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
55 reg = <0x1000000
[all...]
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dti_qspi.txt23 parameters for Mode-0 and Mode-3 operations, which needs to be set up by
24 the bootloader (U-Boot). Default configuration only supports Mode-0
34 reg = <0x47900000 0x100>, <0x30000000 0x4000000>;
37 #size-cells = <0>;
45 reg = <0x4b300000 0x100>,
46 <0x5c000000 0x4000000>,
48 syscon-chipselects = <&scm_conf 0x558>;
50 #size-cells = <0>;
/freebsd/share/man/man4/
H A Dcfi.445 .Cd hint.cfi.0.at="nexus0"
46 .Cd hint.cfi.0.maddr=0x74000000
47 .Cd hint.cfi.0.msize=0x4000000
52 .Cd " reg = <0x74000000 0x4000000>;"
/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dat91-lmu5000.dts20 reg = <0x20000000 0x4000000>;
28 main_clock: clock@0 {
43 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
48 reg = <0x3 0x0 0x800000>;
62 kernel@0 {
64 reg = <0x0 0x400000>;
69 reg = <0x400000 0x3C00000>;
74 reg = <0x4000000 0x2000000>;
79 reg = <0x6000000 0x2000000>;
107 pinctrl-0 = <&pinctrl_ssc0_tx>;
[all …]
H A Dusb_a9g20_common.dtsi18 reg = <0x20000000 0x4000000>;
21 i2c-gpio-0 {
24 reg = <0x56>;
H A Dusb_a9260.dts20 reg = <0x20000000 0x4000000>;
/freebsd/sys/contrib/device-tree/Bindings/reserved-memory/
H A Dshared-dma-pool.yaml82 size = <0x4000000>;
83 alignment = <0x2000>;
88 reg = <0x78000000 0x800000>;
93 reg = <0x50000000 0x4000000>;
/freebsd/sys/contrib/device-tree/src/riscv/microchip/
H A Dmpfs-sev-kit.dts35 reg = <0x0 0x80000000 0x0 0x2000000>;
40 reg = <0x0 0xc4000000 0x0 0x4000000>;
45 reg = <0x
[all...]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dti-aemif.txt25 first address cell and it may accept values 0..N-1
76 it can be in range [0-3]. For compatible
105 Minimum value is 1 (0 treated as 1).
110 Minimum value is 1 (0 treated as 1).
117 Minimum value is 1 (0 treated as 1).
122 Minimum value is 1 (0 treated as 1).
127 Minimum value is 1 (0 treated as 1).
134 Minimum value is 1 (0 treated as 1).
145 clocks = <&clkaemif 0>;
148 reg = <0x21000A00 0x00000100>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dti-abb-regulator.txt17 - #address-cells: should be 0
18 - #size-cells: should be 0
32 0-bypass
56 from efuse-address to pick up ABB characteristics. Set to 0 if
60 + efuse maps to RBB mask. Set to 0 to ignore this.
64 Set to 0 to ignore this.
72 #address-cells = <0>;
73 #size-cells = <0>;
74 reg = <0x483072f0 0x8>, <0x48306818 0x4>;
76 ti,tranxdone-status-mask = <0x4000000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/sigmastar/
H A Dmstar-infinity-msc313.dtsi12 reg = <0x20000000 0x4000000>;
H A Dmstar-mercury5-ssc8336n.dtsi12 reg = <0x20000000 0x4000000>;
H A Dmstar-infinity3-msc313e.dtsi12 reg = <0x20000000 0x4000000>;
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Dkirkwood-lschlv2.dts12 reg = <0x00000000 0x4000000>;
/freebsd/sys/contrib/device-tree/src/riscv/sophgo/
H A Dcv1800b.dtsi13 reg = <0x80000000 0x4000000>;
/freebsd/sys/contrib/device-tree/Bindings/mips/cavium/
H A Dciu2.txt13 the CIU and may have a value between 0 and 63. The second cell is
14 the bit within the bank and may also have a value between 0 and 63.
21 * 1) Controller register (0..63)
22 * 2) Bit within the register (0..63)
24 #address-cells = <0>;
26 reg = <0x10701 0x00000000 0x0 0x4000000>;
/freebsd/sys/compat/linux/
H A Dlinux_persona.h11 LINUX_UNAME26 = 0x0020000,
12 LINUX_ADDR_NO_RANDOMIZE = 0x0040000, /* disable randomization
15 LINUX_FDPIC_FUNCPTRS = 0x0080000, /* userspace function
19 LINUX_MMAP_PAGE_ZERO = 0x0100000,
20 LINUX_ADDR_COMPAT_LAYOUT = 0x0200000,
21 LINUX_READ_IMPLIES_EXEC = 0x0400000,
22 LINUX_ADDR_LIMIT_32BIT = 0x0800000,
23 LINUX_SHORT_INODE = 0x1000000,
24 LINUX_WHOLE_SECONDS = 0x2000000,
25 LINUX_STICKY_TIMEOUTS = 0x4000000,
[all …]

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