Home
last modified time | relevance | path

Searched +full:0 +full:x400000 (Results 1 – 25 of 499) sorted by relevance

12345678910>>...20

/linux/drivers/virt/nitro_enclaves/
H A Dne_misc_dev_test.c6 #define INVALID_VALUE (~0ull)
17 * Add the region from 0x1000 to (0x1000 + 0x200000 - 1):
22 * num = 0
25 {0x1000, 0x200000, -EINVAL, 0, INVALID_VALUE, INVALID_VALUE},
28 * Add the region from 0x200000 to (0x200000 + 0x1000 - 1):
33 * num = 0
36 {0x200000, 0x1000, -EINVAL, 0, INVALID_VALUE, INVALID_VALUE},
39 * Add the region from 0x200000 to (0x200000 + 0x200000 - 1):
46 * {start=0x200000, end=0x3fffff}, // len=0x200000
49 {0x200000, 0x200000, 0, 1, 0x200000, 0x200000},
[all …]
/linux/arch/arm64/boot/dts/amd/
H A Delba-flash-parts.dtsi11 partition@0 {
13 reg = <0x0 0x10000>;
19 reg = <0x10000 0xfff0000>;
24 reg = <0xf0000 0x10000>;
29 reg = <0x100000 0x80000>;
34 reg = <0x180000 0x200000>;
39 reg = <0x380000 0x10000>;
44 reg = <0x390000 0x10000>;
49 reg = <0x400000 0x3c00000>;
54 reg = <0x4010000 0x20000>;
[all …]
/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-cc108.dts29 memory@0 {
31 reg = <0x0 0x20000000>;
36 #phy-cells = <0>;
41 #phy-cells = <0>;
58 flash@0 { /* 16 MB */
60 reg = <0x0>;
66 partition@0 {
68 reg = <0x0 0x400000>; /* 4MB */
72 reg = <0x400000 0x400000>; /* 4MB */
76 reg = <0x800000 0x400000>; /* 4MB */
[all …]
/linux/arch/powerpc/kernel/
H A Dvecemu.c25 0x800000,
26 0x8b95c2,
27 0x9837f0,
28 0xa5fed7,
29 0xb504f3,
30 0xc5672a,
31 0xd744fd,
32 0xeac0c7
45 exp = ((s >> 23) & 0xff) - 127; in eexp2()
48 if (exp == 128 && (s & 0x7fffff) != 0) in eexp2()
[all …]
/linux/drivers/mtd/chips/
H A Dfwh_lock.h7 FWH_UNLOCKED = 0,
37 if (chip->start < 0x400000) { in fwh_xxlock_oneblock()
38 pr_debug( "MTD %s(): chip->start: %lx wanted >= 0x400000\n", in fwh_xxlock_oneblock()
49 * which is 0 at the start of the chip, and then the offset of in fwh_xxlock_oneblock()
53 adr = (adr & ~0xffffUL) | 0x2; in fwh_xxlock_oneblock()
54 adr += chip->start - 0x400000; in fwh_xxlock_oneblock()
76 return 0; in fwh_xxlock_oneblock()
/linux/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dpsoc_global_conf_masks.h23 #define PSOC_GLOBAL_CONF_NON_RST_FLOPS_VAL_SHIFT 0
24 #define PSOC_GLOBAL_CONF_NON_RST_FLOPS_VAL_MASK 0xFFFFFFFF
27 #define PSOC_GLOBAL_CONF_PCI_FW_FSM_EN_SHIFT 0
28 #define PSOC_GLOBAL_CONF_PCI_FW_FSM_EN_MASK 0x1
31 #define PSOC_GLOBAL_CONF_BOOT_SEQ_RE_START_IND_SHIFT 0
32 #define PSOC_GLOBAL_CONF_BOOT_SEQ_RE_START_IND_MASK 0x1
35 #define PSOC_GLOBAL_CONF_BTM_FSM_STATE_SHIFT 0
36 #define PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK 0xF
39 #define PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_SHIFT 0
40 #define PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_MASK 0xF
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm6115-tlmm.yaml59 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
101 reg = <0x500000 0x400000>,
102 <0x900000 0x400000>,
103 <0xd00000 0x400000>;
110 gpio-ranges = <&tlmm 0 0 114>;
H A Dqcom,sm6125-tlmm.yaml60 - pattern: "^gpio[0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2]$"
107 reg = <0x00500000 0x400000>,
108 <0x00900000 0x400000>,
109 <0x00d00000 0x400000>;
113 gpio-ranges = <&tlmm 0 0 134>;
H A Dqcom,sdm630-pinctrl.yaml69 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-3])$"
133 reg = <0x03100000 0x400000>,
134 <0x03500000 0x400000>,
135 <0x03900000 0x400000>;
139 gpio-ranges = <&tlmm 0 0 114>;
/linux/arch/arm/boot/dts/marvell/
H A Darmada-370-mirabox.dts20 memory@0 {
22 reg = <0x00000000 0x20000000>; /* 512 MB */
26 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
27 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
28 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
42 pinctrl-0 = <&pwr_led_pin &stat_led_pins>;
52 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
64 pinctrl-0 = <&ge0_rgmii_pins>;
71 pinctrl-0 = <&ge1_rgmii_pins>;
83 pinctrl-0 = <&sdio_pins3>;
[all …]
H A Darmada-398-db.dts23 reg = <0x00000000 0x80000000>; /* 2 GB */
27 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
28 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
32 pinctrl-0 = <&i2c0_pins>;
39 pinctrl-0 = <&uart0_pins>;
45 pinctrl-0 = <&uart1_pins>;
62 pcie@1,0 {
66 pcie@2,0 {
70 pcie@3,0 {
79 pinctrl-0 = <&spi1_pins>;
[all …]
H A Darmada-390-db.dts24 reg = <0x00000000 0x80000000>; /* 2 GB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
29 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
38 reg = <0x50>;
62 pcie@1,0 {
67 pcie@2,0 {
72 pcie@3,0 {
81 pinctrl-0 = <&spi1_pins>;
84 flash@0 {
89 reg = <0>; /* Chip select 0 */
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dqoriq-fman-0.dtsi2 * QorIQ FMan device tree stub [ controller @ offset 0x400000 ]
38 cell-index = <0>;
40 ranges = <0 0x400000 0xfe000>;
41 reg = <0x400000 0xfe000>;
42 interrupts = <96 2 0 0>, <16 2 1 1>;
43 clocks = <&clockgen 3 0>;
45 fsl,qman-channel-range = <0x40 0xc>;
48 muram@0 {
50 reg = <0x0 0x28000>;
54 cell-index = <0x1>;
[all …]
H A Dqoriq-fman3l-0.dtsi2 * QorIQ FMan v3 device tree stub [ controller @ offset 0x400000 ]
38 cell-index = <0>;
40 ranges = <0 0x400000 0xfe000>;
41 reg = <0x400000 0xfe000>;
42 interrupts = <96 2 0 0>, <16 2 1 1>;
43 clocks = <&clockgen 3 0>;
45 fsl,qman-channel-range = <0x800 0x10>;
48 muram@0 {
50 reg = <0x0 0x30000>;
54 cell-index = <0x2>;
[all …]
H A Dqoriq-fman3-0.dtsi2 * QorIQ FMan v3 device tree stub [ controller @ offset 0x400000 ]
38 cell-index = <0>;
40 ranges = <0 0x400000 0xfe000>;
41 reg = <0x400000 0xfe000>;
42 interrupts = <96 2 0 0>, <16 2 1 1>;
43 clocks = <&clockgen 3 0>;
45 fsl,qman-channel-range = <0x800 0x10>;
48 muram@0 {
50 reg = <0x0 0x60000>;
54 cell-index = <0x2>;
[all …]
/linux/tools/testing/selftests/ptrace/
H A Dget_set_sud.c22 int ret = 0; in TEST()
26 ASSERT_GE(child, 0); in TEST()
27 if (child == 0) { in TEST()
28 ASSERT_EQ(0, sys_ptrace(PTRACE_TRACEME, 0, 0, 0)) { in TEST()
35 waitpid(child, &status, 0); in TEST()
37 memset(&config, 0xff, sizeof(config)); in TEST()
43 ASSERT_EQ(ret, 0); in TEST()
45 ASSERT_EQ(config.selector, 0); in TEST()
46 ASSERT_EQ(config.offset, 0); in TEST()
47 ASSERT_EQ(config.len, 0); in TEST()
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_5_1_sh_mask.h27 #define MM_INDEX__MM_OFFSET_MASK 0x7fffffff
28 #define MM_INDEX__MM_OFFSET__SHIFT 0x0
29 #define MM_INDEX__MM_APER_MASK 0x80000000
30 #define MM_INDEX__MM_APER__SHIFT 0x1f
31 #define MM_INDEX_HI__MM_OFFSET_HI_MASK 0xffffffff
32 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0
33 #define MM_DATA__MM_DATA_MASK 0xffffffff
34 #define MM_DATA__MM_DATA__SHIFT 0x0
35 #define BIF_MM_INDACCESS_CNTL__MM_INDACCESS_DIS_MASK 0x2
36 #define BIF_MM_INDACCESS_CNTL__MM_INDACCESS_DIS__SHIFT 0x1
[all …]
H A Dbif_5_0_sh_mask.h27 #define MM_INDEX__MM_OFFSET_MASK 0x7fffffff
28 #define MM_INDEX__MM_OFFSET__SHIFT 0x0
29 #define MM_INDEX__MM_APER_MASK 0x80000000
30 #define MM_INDEX__MM_APER__SHIFT 0x1f
31 #define MM_INDEX_HI__MM_OFFSET_HI_MASK 0xffffffff
32 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0
33 #define MM_DATA__MM_DATA_MASK 0xffffffff
34 #define MM_DATA__MM_DATA__SHIFT 0x0
35 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK 0x2
36 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE__SHIFT 0x1
[all …]
/linux/tools/perf/tests/
H A Dhists_common.h12 #define FAKE_MAP_PERF 0x400000
13 #define FAKE_MAP_BASH 0x400000
14 #define FAKE_MAP_LIBC 0x500000
15 #define FAKE_MAP_KERNEL 0xf00000
16 #define FAKE_MAP_LENGTH 0x100000
/linux/Documentation/devicetree/bindings/bus/
H A Dallwinner,sun50i-a64-de2.yaml15 pattern: "^bus(@[0-9a-f]+)?$"
47 "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+$":
71 reg = <0x1000000 0x400000>;
75 ranges = <0 0x1000000 0x400000>;
77 display_clocks: clock@0 {
79 reg = <0x0 0x100000>;
/linux/Documentation/devicetree/bindings/soc/fsl/
H A Dfsl,qman-fqd.yaml65 size = <0 0x400000>;
66 alignment = <0 0x400000>;
/linux/arch/arm/boot/dts/microchip/
H A Dat91-lmu5000.dts20 reg = <0x20000000 0x4000000>;
28 main_clock: clock@0 {
43 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
48 reg = <0x3 0x0 0x800000>;
62 kernel@0 {
64 reg = <0x0 0x400000>;
69 reg = <0x400000 0x3C00000>;
74 reg = <0x4000000 0x2000000>;
79 reg = <0x6000000 0x2000000>;
107 pinctrl-0 = <&pinctrl_ssc0_tx>;
[all …]
/linux/drivers/mtd/maps/
H A Dsolutionengine.c24 .size = 0x400000,
30 .size = 0x400000,
38 /* First probe at offset 0 */ in init_soleng_maps()
39 soleng_flash_map.phys = 0; in init_soleng_maps()
40 soleng_flash_map.virt = (void __iomem *)P2SEGADDR(0); in init_soleng_maps()
41 soleng_eprom_map.phys = 0x01000000; in init_soleng_maps()
42 soleng_eprom_map.virt = (void __iomem *)P1SEGADDR(0x01000000); in init_soleng_maps()
46 printk(KERN_NOTICE "Probing for flash chips at 0x00000000:\n"); in init_soleng_maps()
50 printk(KERN_NOTICE "Probing for flash chips at 0x01000000:\n"); in init_soleng_maps()
51 soleng_flash_map.phys = 0x01000000; in init_soleng_maps()
[all …]
/linux/arch/mips/boot/dts/lantiq/
H A Ddanube_easy50712.dts11 memory@0 {
13 reg = <0x0 0x2000000>;
19 localbus@0 {
22 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
23 1 0 0x4000000 0x4000010>; /* addsel1 */
26 nor-boot@0 {
29 reg = <0 0x0 0x2000000>;
33 partition@0 {
35 reg = <0x00000 0x10000>; /* 64 KB */
40 reg = <0x10000 0x10000>; /* 64 KB */
[all …]
/linux/Documentation/devicetree/bindings/soc/ti/
H A Dk3-ringacc.yaml84 reg = <0x0 0x3c000000 0x0 0x400000>,
85 <0x0 0x38000000 0x0 0x400000>,
86 <0x0 0x31120000 0x0 0x100>,
87 <0x0 0x33000000 0x0 0x40000>,
88 <0x0 0x31080000 0x0 0x40000>;
91 ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */

12345678910>>...20