Searched +full:0 +full:x3fffc000 (Results  1 – 8 of 8) sorted by relevance
| /linux/drivers/gpu/drm/radeon/ | 
| H A D | ci_dpm.h | 37 #define CISLANDS_UNUSED_GPIO_PIN 0x7F155 	CISLANDS_CONFIGREG_MMR = 0,
 162 #define POWERCONTAINMENT_FEATURE_BAPM            0x00000001
 163 #define POWERCONTAINMENT_FEATURE_TDCLimit        0x00000002
 164 #define POWERCONTAINMENT_FEATURE_PkgPwrLimit     0x00000004
 187 #define DPMTABLE_OD_UPDATE_SCLK     0x00000001
 188 #define DPMTABLE_OD_UPDATE_MCLK     0x00000002
 189 #define DPMTABLE_UPDATE_SCLK        0x00000004
 190 #define DPMTABLE_UPDATE_MCLK        0x00000008
 298 #define CISLANDS_VOLTAGE_CONTROL_NONE                   0x0
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ | 
| H A D | smu7_dyn_defaults.h | 31 #define SMU7_VOTINGRIGHTSCLIENTS_DFLT0              0x3FFFC10232 #define SMU7_VOTINGRIGHTSCLIENTS_DFLT1              0x000400
 33 #define SMU7_VOTINGRIGHTSCLIENTS_DFLT2              0xC00080
 34 #define SMU7_VOTINGRIGHTSCLIENTS_DFLT3              0xC00200
 35 #define SMU7_VOTINGRIGHTSCLIENTS_DFLT4              0xC01680
 36 #define SMU7_VOTINGRIGHTSCLIENTS_DFLT5              0xC00033
 37 #define SMU7_VOTINGRIGHTSCLIENTS_DFLT6              0xC00033
 38 #define SMU7_VOTINGRIGHTSCLIENTS_DFLT7              0x3FFFC000
 41 #define SMU7_THERMALPROTECTCOUNTER_DFLT            0x200
 42 #define SMU7_STATICSCREENTHRESHOLDUNIT_DFLT        0
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| /linux/Documentation/devicetree/bindings/clock/ | 
| H A D | calxeda.yaml | 20     const: 047         reg = <0x3fffc000 0x1000>;
 51             #size-cells = <0>;
 54                 #clock-cells = <0>;
 60                 #clock-cells = <0>;
 63                 reg = <0x108>;
 67                 #clock-cells = <0>;
 70                 reg = <0x100>;
 74                 #clock-cells = <0>;
 77                 reg = <0x104>;
 
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| /linux/drivers/net/ethernet/realtek/rtase/ | 
| H A D | rtase.h | 12 #define RTASE_HW_VER_MASK     0x7C80000013 #define RTASE_HW_VER_906X_7XA 0x00800000
 14 #define RTASE_HW_VER_906X_7XC 0x04000000
 15 #define RTASE_HW_VER_907XD_V1 0x04800000
 16 #define RTASE_HW_VER_907XD_VA 0x08000000
 26 #define RTASE_INTERFRAMEGAP 0x03
 29 #define RTASE_PCI_REGS_SIZE 0x100
 42 #define RTASE_MITI_TIME_COUNT_MASK    GENMASK(3, 0)
 60 	RTASE_MAC0   = 0x0000,
 61 	RTASE_MAC4   = 0x0004,
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| /linux/arch/m68k/fpsp040/ | 
| H A D | slogn.S | 75 BOUNDS1:  .long 0x3FFEF07D,0x3FFF884176 BOUNDS2:  .long 0x3FFE8000,0x3FFFC000
 78 LOGOF2:	.long 0x3FFE0000,0xB17217F7,0xD1CF79AC,0x00000000
 80 one:	.long 0x3F800000
 81 zero:	.long 0x00000000
 82 infty:	.long 0x7F800000
 83 negone:	.long 0xBF800000
 85 LOGA6:	.long 0x3FC2499A,0xB5E4040B
 86 LOGA5:	.long 0xBFC555B5,0x848CB7DB
 88 LOGA4:	.long 0x3FC99999,0x987D8730
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| /linux/arch/m68k/ifpsp060/ | 
| H A D | fpsp.sa | 1 	.long	0x60ff0000,0x17400000,0x60ff0000,0x15f400002 	.long	0x60ff0000,0x02b60000,0x60ff0000,0x04700000
 3 	.long	0x60ff0000,0x1b100000,0x60ff0000,0x19aa0000
 4 	.long	0x60ff0000,0x1b5a0000,0x60ff0000,0x062e0000
 5 	.long	0x60ff0000,0x102c0000,0x51fc51fc,0x51fc51fc
 6 	.long	0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
 7 	.long	0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
 8 	.long	0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
 9 	.long	0x2f00203a,0xff2c487b,0x0930ffff,0xfef8202f
 10 	.long	0x00044e74,0x00042f00,0x203afef2,0x487b0930
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| /linux/arch/m68k/ifpsp060/src/ | 
| H A D | fplsp.S | 37 	short	0x000039 	short	0x0000
 41 	short	0x0000
 44 	short	0x0000
 46 	short	0x0000
 48 	short	0x0000
 51 	short	0x0000
 53 	short	0x0000
 55 	short	0x0000
 58 	short	0x0000
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| H A D | fpsp.S | 43 set	_off_bsun,	0x0044 set	_off_snan,	0x04
 45 set	_off_operr,	0x08
 46 set	_off_ovfl,	0x0c
 47 set	_off_unfl,	0x10
 48 set	_off_dz,	0x14
 49 set	_off_inex,	0x18
 50 set	_off_fline,	0x1c
 51 set	_off_fpu_dis,	0x20
 52 set	_off_trap,	0x24
 [all …]
 
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