Searched +full:0 +full:x3d400000 (Results 1 – 10 of 10) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/fsl/ |
H A D | imx8m-ddrc.yaml | 66 reg = <0x3d400000 0x400000>;
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/freebsd/sys/contrib/device-tree/Bindings/interconnect/ |
H A D | fsl,imx8m-noc.yaml | 78 reg = <0x32700000 0x100000>; 98 reg = <0x3d400000 0x400000>;
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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | snps,dw-umctl2-ddrc.yaml | 97 reg = <0xfd070000 0x30000>; 108 reg = <0x3d400000 0x400000>;
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/freebsd/contrib/llvm-project/lld/MachO/Arch/ |
H A D | ARM64.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 74 0x90000010, // 00: adrp x16, __la_symbol_ptr@page 75 0xf9400210, // 04: ldr x16, [x16, __la_symbol_ptr@pageoff] 76 0xd61f0200, // 08: br x16 85 0x90000011, // 00: adrp x17, _dyld_private@page 86 0x91000231, // 04: add x17, x17, _dyld_private@pageoff 87 0xa9bf47f0, // 08: stp x16/x17, [sp, #-16]! 88 0x90000010, // 0c: adrp x16, dyld_stub_binder@page 89 0xf9400210, // 10: ldr x16, [x16, dyld_stub_binder@pageoff] 90 0xd61f0200, // 14: br x16 [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8mn.dtsi | 46 #size-cells = <0>; 53 arm,psci-suspend-param = <0x0010033>; 61 A53_0: cpu@0 { 64 reg = <0x0>; 68 i-cache-size = <0x8000>; 71 d-cache-size = <0x8000>; 85 reg = <0x1>; 89 i-cache-size = <0x8000>; 92 d-cache-size = <0x8000>; 104 reg = <0x2>; [all …]
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H A D | imx8mm.dtsi | 46 #size-cells = <0>; 53 arm,psci-suspend-param = <0x0010033>; 61 A53_0: cpu@0 { 64 reg = <0x0>; 68 i-cache-size = <0x8000>; 71 d-cache-size = <0x8000>; 85 reg = <0x1>; 89 i-cache-size = <0x8000>; 92 d-cache-size = <0x8000>; 104 reg = <0x2>; [all …]
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H A D | imx8mq.dtsi | 47 #clock-cells = <0>; 54 #clock-cells = <0>; 61 #clock-cells = <0>; 68 #clock-cells = <0>; 75 #clock-cells = <0>; 82 #clock-cells = <0>; 89 #clock-cells = <0>; 96 #clock-cells = <0>; 103 #size-cells = <0>; 105 A53_0: cpu@0 { [all …]
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H A D | imx8mp.dtsi | 48 #size-cells = <0>; 50 A53_0: cpu@0 { 53 reg = <0x0>; 57 i-cache-size = <0x8000>; 60 d-cache-size = <0x8000>; 73 reg = <0x1>; 77 i-cache-size = <0x8000>; 80 d-cache-size = <0x8000>; 91 reg = <0x2>; 95 i-cache-size = <0x8000>; [all …]
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/freebsd/tools/test/iconv/ref/ |
H A D | UTF-32BE-rev | 1 0x00 = 0x00000000 2 0x01 = 0x01000000 3 0x02 = 0x02000000 4 0x03 = 0x03000000 5 0x04 = 0x04000000 6 0x05 = 0x05000000 7 0x06 = 0x06000000 8 0x07 = 0x07000000 9 0x08 = 0x08000000 10 0x09 = 0x09000000 [all …]
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/freebsd/sys/dev/qlnx/qlnxe/ |
H A D | ecore_init_values.h | 35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */ 36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */ 37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */ 38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */ 40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */ 41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */ 42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */ 43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */ 44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */ 45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */ [all …]
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