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Searched +full:0 +full:x3d00000 (Results 1 – 14 of 14) sorted by relevance

/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-sc8180x.yaml89 reg = <0 0x01c00000 0 0x3000>,
90 <0 0x60000000 0 0xf1d>,
91 <0 0x60000f20 0 0xa8>,
92 <0 0x60001000 0 0x1000>,
93 <0 0x60100000 0 0x100000>;
99 ranges = <0x01000000 0x0 0x60200000 0x0 0x60200000 0x0 0x100000>,
100 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
102 bus-range = <0x00 0xff>;
104 linux,pci-domain = <0>;
149 interrupt-map-mask = <0 0 0 0x7>;
[all …]
H A Dqcom,pcie-sm8350.yaml92 reg = <0 0x01c00000 0 0x3000>,
93 <0 0x60000000 0 0xf1d>,
94 <0 0x60000f20 0 0xa8>,
95 <0 0x60001000 0 0x1000>,
96 <0 0x60100000 0 0x100000>;
98 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
99 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
101 bus-range = <0x00 0xff>;
103 linux,pci-domain = <0>;
139 interrupt-map-mask = <0 0 0 0x7>;
[all …]
H A Dqcom,pcie-sm8150.yaml90 reg = <0 0x01c00000 0 0x3000>,
91 <0 0x60000000 0 0xf1d>,
92 <0 0x60000f20 0 0xa8>,
93 <0 0x60001000 0 0x1000>,
94 <0 0x60100000 0 0x100000>;
96 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
97 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
99 bus-range = <0x00 0xff>;
101 linux,pci-domain = <0>;
135 interrupt-map-mask = <0 0 0 0x7>;
[all …]
H A Dqcom,pcie-sm8250.yaml102 reg = <0 0x01c00000 0 0x3000>,
103 <0 0x60000000 0 0xf1d>,
104 <0 0x60000f20 0 0xa8>,
105 <0 0x60001000 0 0x1000>,
106 <0 0x60100000 0 0x100000>,
107 <0 0x01c03000 0 0x1000>;
109 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
110 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
112 bus-range = <0x00 0xff>;
114 linux,pci-domain = <0>;
[all …]
/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm730-kudo.dts45 reg = <0 0x40000000>;
50 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
60 dev-num = <0>;
66 reg = <0xf0201000 0x1000>;
381 pinctrl-0 = <&spi0cs1_pins>;
383 flash@0 {
387 reg = <0>;
395 u-boot@0 {
397 reg = <0x0000000 0xC0000>;
402 reg = <0x00100000 0x40000>;
[all …]
/linux/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_hw.c15 #define OCM_WIN_P3P(addr) (addr & 0xffc0000)
19 #define CRB_BLK(off) ((off >> 20) & 0x3f)
20 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
21 #define CRB_WINDOW_2M (0x130060)
22 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
23 #define CRB_INDIRECT_2M (0x1e0000UL)
52 {{{0, 0, 0, 0} } }, /* 0: PCI */
53 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
54 {1, 0x0110000, 0x0120000, 0x130000},
55 {1, 0x0120000, 0x0122000, 0x124000},
[all …]
/linux/drivers/net/ethernet/qlogic/netxen/
H A Dnetxen_nic_hw.c16 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
18 #define MS_WIN(addr) (addr & 0x0ffc0000)
22 #define CRB_BLK(off) ((off >> 20) & 0x3f)
23 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
24 #define CRB_WINDOW_2M (0x130060)
25 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
26 #define CRB_INDIRECT_2M (0x1e0000UL)
57 {{{0, 0, 0, 0} } }, /* 0: PCI */
58 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8250.dtsi80 #clock-cells = <0>;
88 #clock-cells = <0>;
94 #size-cells = <0>;
96 cpu0: cpu@0 {
99 reg = <0x0 0x0>;
100 clocks = <&cpufreq_hw 0>;
107 qcom,freq-domain = <&cpufreq_hw 0>;
109 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
115 cache-size = <0x20000>;
121 cache-size = <0x400000>;
[all …]
H A Dsm8350.dtsi38 #clock-cells = <0>;
46 #clock-cells = <0>;
52 #size-cells = <0>;
54 cpu0: cpu@0 {
57 reg = <0x0 0x0>;
58 clocks = <&cpufreq_hw 0>;
61 qcom,freq-domain = <&cpufreq_hw 0>;
81 reg = <0x0 0x100>;
82 clocks = <&cpufreq_hw 0>;
85 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsm8150.dtsi34 #clock-cells = <0>;
41 #clock-cells = <0>;
49 #size-cells = <0>;
51 cpu0: cpu@0 {
54 reg = <0x0 0x0>;
55 clocks = <&cpufreq_hw 0>;
60 qcom,freq-domain = <&cpufreq_hw 0>;
62 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
83 reg = <0x0 0x100>;
84 clocks = <&cpufreq_hw 0>;
[all …]
H A Dsm8550.dtsi38 #clock-cells = <0>;
43 #clock-cells = <0>;
47 #clock-cells = <0>;
55 #clock-cells = <0>;
65 #size-cells = <0>;
67 cpu0: cpu@0 {
70 reg = <0 0>;
71 clocks = <&cpufreq_hw 0>;
76 qcom,freq-domain = <&cpufreq_hw 0>;
96 reg = <0 0x100>;
[all …]
H A Dsm8650.dtsi40 #clock-cells = <0>;
45 #clock-cells = <0>;
50 #clock-cells = <0>;
59 #clock-cells = <0>;
69 #size-cells = <0>;
71 cpu0: cpu@0 {
74 reg = <0 0>;
76 clocks = <&cpufreq_hw 0>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
107 reg = <0 0x100>;
[all …]
/linux/drivers/scsi/qla2xxx/
H A Dqla_nx.c15 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | \
16 ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | \
18 ((addr >> 25) & 0x3ff))
19 #define MS_WIN(addr) (addr & 0x0ffc0000)
20 #define QLA82XX_PCI_MN_2M (0)
21 #define QLA82XX_PCI_MS_2M (0x80000)
22 #define QLA82XX_PCI_OCM0_2M (0xc0000)
23 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
25 #define BLOCK_PROTECT_BITS 0x0F
[all …]
/linux/drivers/scsi/qla4xxx/
H A Dql4_nx.c18 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
19 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
20 #define MS_WIN(addr) (addr & 0x0ffc0000)
21 #define QLA82XX_PCI_MN_2M (0)
22 #define QLA82XX_PCI_MS_2M (0x80000)
23 #define QLA82XX_PCI_OCM0_2M (0xc0000)
24 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
28 #define CRB_BLK(off) ((off >> 20) & 0x3f)
29 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
30 #define CRB_WINDOW_2M (0x130060)
[all …]