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/linux/arch/arm64/boot/dts/qcom/
H A Dsa8540p-ride.dts34 regulators-0 {
162 pinctrl-0 = <&ethernet0_default>;
169 #size-cells = <0>;
173 compatible = "ethernet-phy-id0141.0dd4";
174 reg = <0x8>;
188 /* Set MODE[2:0] to RGMII_SGMII */
189 <0x12 0x14 0xfff8 0x4>,
190 /* Soft reset required after changing MODE[2:0] */
191 <0x12 0x14 0x7fff 0x8000>;
201 snps,map-to-dma-channel = <0x0>;
[all …]
H A Dqcs8300-ride.dts31 pinctrl-0 = <&usb2_en>;
39 regulators-0 {
215 pinctrl-0 = <&ethernet0_default>;
227 #size-cells = <0>;
231 reg = <0x8>;
246 snps,map-to-dma-channel = <0x0>;
248 snps,priority = <0x1>;
253 snps,map-to-dma-channel = <0x1>;
259 snps,map-to-dma-channel = <0x2>;
265 snps,map-to-dma-channel = <0x3>;
[all …]
H A Dmonaco-evk.dts29 dmic: audio-codec-0 {
31 #sound-dai-cells = <0>;
37 #sound-dai-cells = <0>;
44 pinctrl-0 = <&hs0_mi2s_active>, <&mi2s1_active>;
82 regulators-0 {
221 pinctrl-0 = <&ethernet0_default>;
234 #size-cells = <0>;
238 reg = <0x1c>;
251 snps,map-to-dma-channel = <0x0>;
253 snps,priority = <0x1>;
[all …]
H A Dlemans-evk.dts26 dmic: audio-codec-0 {
28 #sound-dai-cells = <0>;
34 #sound-dai-cells = <0>;
69 pinctrl-0 = <&hs0_mi2s_active>, <&hs2_mi2s_active>;
122 states = <1800000 1>, <2950000 0>;
129 regulators-0 {
361 pinctrl-0 = <&ethernet0_default>;
375 #size-cells = <0>;
379 reg = <0x1c>;
392 snps,map-to-dma-channel = <0x0>;
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_12_0_0_offset.h29 // base address: 0x4980
30 …SDMA0_DEC_START 0x0000
31 …e regSDMA0_DEC_START_BASE_IDX 0
32 …SDMA0_MCU_MISC_CNTL 0x0001
33 …e regSDMA0_MCU_MISC_CNTL_BASE_IDX 0
34 …SDMA0_UCODE_REV 0x0003
35 …e regSDMA0_UCODE_REV_BASE_IDX 0
36 …SDMA0_GLOBAL_TIMESTAMP_LO 0x0005
37 …e regSDMA0_GLOBAL_TIMESTAMP_LO_BASE_IDX 0
38 …SDMA0_GLOBAL_TIMESTAMP_HI 0x0006
[all …]
H A Dgc_11_0_3_offset.h29 // base address: 0x4980
30 …SDMA0_DEC_START 0x0000
31 …e regSDMA0_DEC_START_BASE_IDX 0
32 …SDMA0_F32_MISC_CNTL 0x000b
33 …e regSDMA0_F32_MISC_CNTL_BASE_IDX 0
34 …SDMA0_GLOBAL_TIMESTAMP_LO 0x000f
35 …e regSDMA0_GLOBAL_TIMESTAMP_LO_BASE_IDX 0
36 …SDMA0_GLOBAL_TIMESTAMP_HI 0x0010
37 …e regSDMA0_GLOBAL_TIMESTAMP_HI_BASE_IDX 0
38 …SDMA0_POWER_CNTL 0x001a
[all …]
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_dump.h22 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
23 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
24 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
25 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
45 #define BNX2X_DUMP_VERSION 0x61111111
65 static const u32 page_vals_e2[] = {0, 128};
68 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
74 static const u32 page_vals_e3[] = {0, 128};
77 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
81 { 0x2000, 1, 0x1f, 0xfff},
[all …]