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/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dqcom,sc7280-wpss-pil.yaml166 reg = <0x08a00000 0x10000>;
169 <&wpss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
192 qcom,smem-states = <&wpss_smp2p_out 0>;
199 qcom,halt-regs = <&tcsr_mutex 0x37000>;
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam33xx-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x40
[all...]
H A Dam437x-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x40
[all...]
/freebsd/sys/dev/cxgbe/common/
H A Dt4_hw.c45 } while (0)
59 * at the time it indicated completion is stored there. Returns 0 if the
71 return 0; in t4_wait_op_done_val()
73 if (--attempts == 0) in t4_wait_op_done_val()
98 * and stores the value in @valp if it is not NULL. Returns 0 if the
111 return 0; in t7_wait_sram_done()
114 if (--attempts == 0) in t7_wait_sram_done()
213 * Reset F_ENABLE to 0 so reads of PCIE_CFG_SPACE_DATA won't cause a in t4_hw_pci_read_cfg4()
215 * F_ENABLE is 0 so a simple register write is easier than a in t4_hw_pci_read_cfg4()
218 t4_write_reg(adap, A_PCIE_CFG_SPACE_REQ, 0); in t4_hw_pci_read_cfg4()
[all …]
/freebsd/sys/dev/bxe/
H A Dbxe_dump.h33 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
34 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
35 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
36 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
56 #define BNX2X_DUMP_VERSION 0x61111111
76 static const uint32_t page_vals_e2[] = {0, 128};
79 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
85 static const uint32_t page_vals_e3[] = {0, 128};
88 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
92 { 0x2000, 1, 0x1f, 0xfff},
[all …]
/freebsd/usr.sbin/cxgbetool/
H A Dreg_defs_t7.c3 /* Directory name: t7_sw_reg.txt, Changeset: 5946:0b60ff298e7d */
6 { "SGE_PF_KDOORBELL", 0x1e000, 0 },
10 { "PIDX", 0, 13 },
11 { "SGE_PF_GTS", 0x1e004, 0 },
15 { "CIDXInc", 0, 12 },
16 { "SGE_PF_KTIMESTAMP_LO", 0x1e008, 0 },
17 { "SGE_PF_KTIMESTAMP_HI", 0x1e00c, 0 },
18 { "SGE_PF_KDOORBELL", 0x1e400, 0 },
22 { "PIDX", 0, 13 },
23 { "SGE_PF_GTS", 0x1e404, 0 },
[all …]
H A Dreg_defs_t6.c5 { "SGE_PF_KDOORBELL", 0x1e000, 0 },
9 { "PIDX", 0, 13 },
10 { "SGE_PF_GTS", 0x1e004, 0 },
14 { "CIDXInc", 0, 12 },
15 { "SGE_PF_KTIMESTAMP_LO", 0x1e008, 0 },
16 { "SGE_PF_KTIMESTAMP_HI", 0x1e00c, 0 },
17 { "SGE_PF_KDOORBELL", 0x1e400, 0 },
21 { "PIDX", 0, 13 },
22 { "SGE_PF_GTS", 0x1e404, 0 },
26 { "CIDXInc", 0, 12 },
[all …]
H A Dreg_defs_t5.c5 { "SGE_PF_KDOORBELL", 0x1e000, 0 },
9 { "PIDX", 0, 13 },
10 { "SGE_PF_GTS", 0x1e004, 0 },
14 { "CIDXInc", 0, 12 },
15 { "SGE_PF_KTIMESTAMP_LO", 0x1e008, 0 },
16 { "SGE_PF_KTIMESTAMP_HI", 0x1e00c, 0 },
17 { "SGE_PF_KDOORBELL", 0x1e400, 0 },
21 { "PIDX", 0, 13 },
22 { "SGE_PF_GTS", 0x1e404, 0 },
26 { "CIDXInc", 0, 12 },
[all …]