Searched +full:0 +full:x318000 (Results 1 – 7 of 7) sorted by relevance
2 * QorIQ QMan device tree stub [ controller @ offset 0x318000 ]37 reg = <0x318000 0x1000>;
2 * QorIQ QMan rev3 device tree stub [ controller @ offset 0x318000 ]37 reg = <0x318000 0x2000>;
35 registers which are located at offsets 0xbf8 and 0xbfc87 reg = <0x318000 0x1000>;89 fsl,liodn = <0x16>;
34 are located at offsets 0xbf8 and 0xbfc133 size = <0 0x400000>;134 alignment = <0 0x400000>;139 size = <0 0x2000000>;140 alignment = <0 0x2000000>;159 reg = <0xc00 0x4>;175 reg = <0x318000 0x1000>;177 fsl,liodn = <0x16>;185 fsl,qman = <&qman, 0>;
103 #size-cells = <0>;105 cpu0: PowerPC,e500mc@0 {107 reg = <0>;145 dcsr-epu@0 {147 interrupts = <52 2 0 0148 84 2 0 0149 85 2 0 0>;151 reg = <0x0 0x1000>;155 reg = <0x1000 0x1000 0x1000000 0x8000>;159 reg = <0x2000 0x1000>;[all …]
102 #size-cells = <0>;104 cpu0: PowerPC,e500mc@0 {106 reg = <0>;144 dcsr-epu@0 {146 interrupts = <52 2 0 0147 84 2 0 0148 85 2 0 0>;150 reg = <0x0 0x1000>;154 reg = <0x1000 0x1000 0x1000000 0x8000>;158 reg = <0x2000 0x1000>;[all …]
109 #size-cells = <0>;111 cpu0: PowerPC,e5500@0 {113 reg = <0>;135 dcsr-epu@0 {137 interrupts = <52 2 0 0138 84 2 0 0139 85 2 0 0>;141 reg = <0x0 0x1000>;145 reg = <0x1000 0x1000 0x1000000 0x8000>;149 reg = <0x2000 0x1000>;[all …]