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Searched +full:0 +full:x31000 (Results 1 – 21 of 21) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dqcom,aoss-reset.yaml50 reg = <0xc2a0000 0x31000>;
/freebsd/sys/contrib/device-tree/src/arm/unisoc/
H A Drda8810pl.dtsi19 #size-cells = <0>;
21 cpu@0 {
24 reg = <0x0>;
30 reg = <0x100000 0x10000>;
40 ranges = <0x0 0x10000000 0xfffffff>;
44 reg = <0x1a08000 0x1000>;
55 ranges = <0x0 0x20800000 0x100000>;
57 intc: interrupt-controller@0 {
59 reg = <0x0 0x1000>;
69 ranges = <0x0 0x20900000 0x100000>;
[all …]
/freebsd/sys/arm/ti/am335x/
H A Dam335x_dmtreg.h32 #define DMT_TIDR 0x00 /* Identification Register */
33 #define DMT_TIOCP_CFG 0x10 /* OCP Configuration Reg */
34 #define DMT_TIOCP_RESET (1 << 0) /* TIOCP perform soft reset */
35 #define DMT_IQR_EOI 0x20 /* IRQ End-Of-Interrupt Reg */
36 #define DMT_IRQSTATUS_RAW 0x24 /* IRQSTATUS Raw Reg */
37 #define DMT_IRQSTATUS 0x28 /* IRQSTATUS Reg */
38 #define DMT_IRQENABLE_SET 0x2c /* IRQSTATUS Set Reg */
39 #define DMT_IRQENABLE_CLR 0x30 /* IRQSTATUS Clear Reg */
40 #define DMT_IRQWAKEEN 0x34 /* IRQ Wakeup Enable Reg */
41 #define DMT_IRQ_MAT (1 << 0) /* IRQ: Match */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm-hr2.dtsi45 #size-cells = <0>;
47 cpu0: cpu@0 {
51 reg = <0x0>;
64 ranges = <0x00000000 0x19000000 0x00023000>;
68 a9pll: arm_clk@0 {
69 #clock-cells = <0>;
72 reg = <0x0 0x100
[all...]
H A Dbcm-nsp.dtsi54 #size-cells = <0>;
56 cpu0: cpu@0 {
60 reg = <0x0>;
68 secondary-boot-reg = <0xffff0fec>;
69 reg = <0x1>;
82 ranges = <0x00000000 0x19000000 0x00023000>;
86 a9pll: arm_clk@0 {
87 #clock-cells = <0>;
[all...]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap2430.dtsi18 ranges = <0 0x49000000 0x31000>;
22 reg = <0x6000 0x1000>;
26 #size-cells = <0>;
35 reg = <0x2000 0x1000>;
39 ranges = <0 0x2000 0x1000>;
44 reg = <0x30 0x0154>;
46 #size-cells = <0>;
49 pinctrl-single,function-mask = <0x3f>;
55 reg = <0x270 0x240>;
58 ranges = <0 0x270 0x240>;
[all …]
H A Dam33xx-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x40
[all...]
H A Dam437x-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x40
[all...]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dt1023si-post.dtsi39 alloc-ranges = <0 0 0x10000 0>;
44 alloc-ranges = <0 0 0x10000 0>;
49 alloc-ranges = <0 0 0x10000 0>;
56 interrupts = <25 2 0 0>;
64 bus-range = <0x0 0xff>;
65 interrupts = <20 2 0 0>;
67 pcie@0 {
68 reg = <0 0 0 0 0>;
73 interrupts = <20 2 0 0>;
74 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
H A Db4si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x200000 */
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
66 pcie@0 {
71 reg = <0 0 0 0 0>;
72 interrupts = <20 2 0 0>;
[all …]
H A Dt2081si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
66 pcie@0 {
67 reg = <0 0 0 0 0>;
[all …]
H A Dt1040si-post.dtsi39 alloc-ranges = <0 0 0x10000 0>;
44 alloc-ranges = <0 0 0x10000 0>;
49 alloc-ranges = <0 0 0x10000 0>;
56 interrupts = <25 2 0 0>;
64 bus-range = <0x0 0xff>;
65 interrupts = <20 2 0 0>;
67 pcie@0 {
68 reg = <0 0 0 0 0>;
73 interrupts = <20 2 0 0>;
74 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
H A Dt4240si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
65 pcie@0 {
70 reg = <0 0 0 0 0>;
[all …]
/freebsd/sys/cam/scsi/
H A Dscsi_cd.h53 #define CD_RELADDR 0x01
54 #define CD_MSF 0x02
64 #define SGC_RT_ALL 0x00
65 #define SGC_RT_CURRENT 0x01
66 #define SGC_RT_SPECIFIC 0x02
67 #define SGC_RT_MASK 0x03
85 #define SGC_F_CURRENT 0x01
86 #define SGC_F_PERSISTENT 0x02
87 #define SGC_F_VERSION_MASK 0x2C
109 #define SGESN_NEA 0x80
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsc7180.dtsi66 #clock-cells = <0>;
72 #clock-cells = <0>;
78 #size-cells = <0>;
80 CPU0: cpu@0 {
83 reg = <0x0 0x0>;
84 clocks = <&cpufreq_hw 0>;
95 qcom,freq-domain = <&cpufreq_hw 0>;
112 reg = <0x0 0x100>;
113 clocks = <&cpufreq_hw 0>;
124 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsm6350.dtsi32 #clock-cells = <0>;
40 #clock-cells = <0>;
46 #size-cells = <0>;
48 CPU0: cpu@0 {
51 reg = <0x0 0x0>;
52 clocks = <&cpufreq_hw 0>;
57 qcom,freq-domain = <&cpufreq_hw 0>;
81 reg = <0x0 0x100>;
82 clocks = <&cpufreq_hw 0>;
87 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsdm845.dtsi78 #clock-cells = <0>;
85 #clock-cells = <0>;
92 #size-cells = <0>;
94 CPU0: cpu@0 {
97 reg = <0x0 0x0>;
98 clocks = <&cpufreq_hw 0>;
102 qcom,freq-domain = <&cpufreq_hw 0>;
126 reg = <0x0 0x100>;
127 clocks = <&cpufreq_hw 0>;
131 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsc7280.dtsi81 #clock-cells = <0>;
87 #clock-cells = <0>;
98 reg = <0x0 0x004cd000 0x0 0x1000>;
102 reg = <0x0 0x80000000 0x0 0x600000>;
107 reg = <0x0 0x80600000 0x0 0x200000>;
112 reg = <0x0 0x80800000 0x0 0x60000>;
117 reg = <0x0 0x80860000 0x0 0x20000>;
123 reg = <0x0 0x80884000 0x0 0x10000>;
128 reg = <0x0 0x808ff000 0x0 0x1000>;
133 reg = <0x0 0x80900000 0x0 0x200000>;
[all …]
/freebsd/sys/dev/bxe/
H A Dbxe_dump.h33 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
34 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
35 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
36 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
56 #define BNX2X_DUMP_VERSION 0x61111111
76 static const uint32_t page_vals_e2[] = {0, 128};
79 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
85 static const uint32_t page_vals_e3[] = {0, 128};
88 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
92 { 0x2000, 1, 0x1f, 0xfff},
[all …]
/freebsd/sys/dev/cxgbe/common/
H A Dt4_hw.c46 } while (0)
60 * at the time it indicated completion is stored there. Returns 0 if the
72 return 0; in t4_wait_op_done_val()
74 if (--attempts == 0) in t4_wait_op_done_val()
179 * Reset F_ENABLE to 0 so reads of PCIE_CFG_SPACE_DATA won't cause a in t4_hw_pci_read_cfg4()
181 * F_ENABLE is 0 so a simple register write is easier than a in t4_hw_pci_read_cfg4()
184 t4_write_reg(adap, A_PCIE_CFG_SPACE_REQ, 0); in t4_hw_pci_read_cfg4()
213 CH_ERR(adap, "firmware reports adapter error: %s (0x%08x)\n", in t4_report_fw_error()
291 t4_set_reg_field(sc, port_ctl_reg, F_PORTTXEN, 0); in check_tx_state()
298 #define X_CIM_PF_NOACCESS 0xeeeeeeee
[all …]
/freebsd/usr.sbin/cxgbetool/
H A Dreg_defs_t6.c5 { "SGE_PF_KDOORBELL", 0x1e000, 0 },
9 { "PIDX", 0, 13 },
10 { "SGE_PF_GTS", 0x1e004, 0 },
14 { "CIDXInc", 0, 12 },
15 { "SGE_PF_KTIMESTAMP_LO", 0x1e008, 0 },
16 { "SGE_PF_KTIMESTAMP_HI", 0x1e00c, 0 },
17 { "SGE_PF_KDOORBELL", 0x1e400, 0 },
21 { "PIDX", 0, 13 },
22 { "SGE_PF_GTS", 0x1e404, 0 },
26 { "CIDXInc", 0, 12 },
[all …]