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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dmarvell,odmi-controller.txt24 ODMI frame. Those SPI interrupts are 0-based,
37 reg = <0x300000 0x4000>,
38 <0x304000 0x4000>,
39 <0x308000 0x4000>,
40 <0x30C000 0x4000>;
H A Dmarvell,odmi-controller.yaml32 interrupts are 0-based, i.e. marvell,spi-base = <128> will use SPI #96.
52 reg = <0x300000 0x4000>, <0x304000 0x4000>, <0x308000 0x4000>, <0x30C000 0x4000>;
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-ap80x.dtsi41 reg = <0x0 0x4000000 0x0 0x200000>;
46 reg = <0 0x4400000 0 0x1000000>;
77 ranges = <0x0 0x0 0xf0000000 0x1000000>;
81 reg = <0x100000 0x100000>;
105 reg = <0x210000 0x10000>,
106 <0x220000 0x20000>,
107 <0x240000 0x20000>,
108 <0x260000 0x20000>;
113 reg = <0x280000 0x1000>;
120 reg = <0x290000 0x1000>;
[all …]
/freebsd/sys/dev/bxe/
H A Dbxe_dump.h33 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
34 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
35 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
36 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
56 #define BNX2X_DUMP_VERSION 0x61111111
76 static const uint32_t page_vals_e2[] = {0, 128};
79 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
85 static const uint32_t page_vals_e3[] = {0, 128};
88 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
92 { 0x2000, 1, 0x1f, 0xfff},
[all …]
H A D57712_init_values.c54 /* #define ATC_COMMON_START 0 */
55 {OP_WR, 0x1100b8, 0x1},
58 {OP_WR, 0x600dc, 0x1},
59 {OP_WR, 0x60050, 0x180},
60 {OP_SW, 0x61000, 0x1ff0000},
61 {OP_IF_MODE_AND, 1, 0x8}, /* e2 */
62 {OP_WR, 0x617fc, 0x3fe001},
63 {OP_IF_MODE_AND, 1, 0x10}, /* e3 */
64 {OP_SW, 0x617fc, 0x20101ff},
65 {OP_IF_MODE_AND, 1, 0x8}, /* e2 */
[all …]