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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx8m-pinctrl.yaml81 reg = <0x30330000 0x10000>;
85 <0x23C 0x4A4 0x4FC 0x0 0x0 0x140>,
86 <0x240 0x4A8 0x000 0x0 0x0 0x140>;
H A Dfsl,imx9-pinctrl.yaml78 reg = <0x30330000 0x10000>;
82 <0x48 0x1f8 0x41c 0x1 0x0 0x49>,
83 <0x4c 0x1fc 0x418 0x1 0x0 0x49>;
H A Dfsl,imx7d-pinctrl.yaml94 reg = <0x30330000 0x10000>;
98 <0x0160 0x03D0 0x0714 0x1 0x0 0x7e>,
99 <0x0164 0x03D4 0x0000 0x1 0x0 0x76>;
105 reg = <0x302c0000 0x10000>;
110 <0x0008 0x0038 0x0000 0x0 0x0 0x59>,
111 <0x000C 0x003C 0x0000 0x0 0x0 0x59>;
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn.dtsi46 #size-cells = <0>;
53 arm,psci-suspend-param = <0x0010033>;
61 A53_0: cpu@0 {
64 reg = <0x0>;
68 i-cache-size = <0x8000>;
71 d-cache-size = <0x8000>;
85 reg = <0x1>;
89 i-cache-size = <0x8000>;
92 d-cache-size = <0x8000>;
104 reg = <0x2>;
[all …]
H A Dimx8mm.dtsi46 #size-cells = <0>;
53 arm,psci-suspend-param = <0x0010033>;
61 A53_0: cpu@0 {
64 reg = <0x0>;
68 i-cache-size = <0x8000>;
71 d-cache-size = <0x8000>;
85 reg = <0x1>;
89 i-cache-size = <0x8000>;
92 d-cache-size = <0x8000>;
104 reg = <0x2>;
[all …]
H A Dimx8mq.dtsi47 #clock-cells = <0>;
54 #clock-cells = <0>;
61 #clock-cells = <0>;
68 #clock-cells = <0>;
75 #clock-cells = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
96 #clock-cells = <0>;
103 #size-cells = <0>;
105 A53_0: cpu@0 {
[all …]
H A Dimx8mp.dtsi48 #size-cells = <0>;
50 A53_0: cpu@0 {
53 reg = <0x0>;
57 i-cache-size = <0x8000>;
60 d-cache-size = <0x8000>;
73 reg = <0x1>;
77 i-cache-size = <0x8000>;
80 d-cache-size = <0x8000>;
91 reg = <0x2>;
95 i-cache-size = <0x8000>;
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7s.dtsi56 #size-cells = <0>;
63 arm,psci-suspend-param = <0x0010000>;
71 cpu0: cpu@0 {
74 reg = <0>;
94 opp-supported-hw = <0xf>, <0xf>;
100 #clock-cells = <0>;
107 #clock-cells = <0>;
116 #phy-cells = <0>;
124 #phy-cells = <0>;
143 #size-cells = <0>;
[all …]