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/freebsd/sys/contrib/device-tree/src/arm64/sprd/
H A Dums512.dtsi18 #size-cells = <0>;
49 CPU0: cpu@0 {
52 reg = <0x0 0x0>;
60 reg = <0x0 0x100>;
68 reg = <0x0 0x200>;
76 reg = <0x0 0x300>;
84 reg = <0x0 0x400>;
92 reg = <0x0 0x500>;
100 reg = <0x0 0x600>;
108 reg = <0x0 0x700>;
[all …]
H A Dsharkl3.dtsi22 reg = <0 0x20e00000 0 0x4000>;
25 ranges = <0 0 0x20e00000 0x4000>;
27 apahb_gate: apahb-gate@0 {
29 reg = <0x0 0x1020>;
37 reg = <0 0x402b0000 0 0x4000>;
40 ranges = <0 0 0x402b0000 0x4000>;
42 pmu_gate: pmu-gate@0 {
44 reg = <0 0x1200>;
54 reg = <0 0x402e0000 0 0x4000>;
57 ranges = <0 0 0x402e0000 0x4000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ul-ccimx6ulsom.dtsi12 reg = <0x80000000 0>; /* will be filled by U-Boot */
23 size = <0x4000000>;
35 pinctrl-0 = <&pinctrl_gpmi_nand>;
42 pinctrl-0 = <&pinctrl_i2c1>;
47 reg = <0x08>;
171 pinctrl-0 = <&pinctrl_uart1>;
179 pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_wifibt_ctrl>;
190 MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
191 MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
192 MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
[all …]
H A Dimx6q-apalis-ixora-v1.2.dts37 pinctrl-0 = <&pinctrl_leds_ixora>;
63 gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>;
65 pinctrl-0 = <&pinctrl_enable_3v3_vmmc>;
77 pinctrl-0 = <&pinctrl_enable_can1_power>;
87 pinctrl-0 = <&pinctrl_enable_can2_power>;
105 pinctrl-0 = <&pinctrl_uart24_forceoff>;
127 reg = <0x68>;
132 reg = <0x50>;
147 pinctrl-0 = <&pinctrl_reset_moci>;
221 pinctrl-0
[all...]
H A Dimx6ul-ccimx6ulsbcpro.dts21 pwms = <&pwm5 0 50000 0>;
22 brightness-levels = <0 4 8 16 32 64 128 255>;
51 pinctrl-0 = <&pinctrl_adc1>;
57 pinctrl-0 = <&pinctrl_flexcan1>;
65 pinctrl-0 = <&pinctrl_flexcan2>;
73 pinctrl-0 = <&pinctrl_ecspi1_master>;
79 pinctrl-0 = <&pinctrl_enet1>;
87 pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>;
96 #size-cells = <0>;
98 ethphy0: ethernet-phy@0 {
[all …]
H A Dimx6qdl-colibri.dtsi24 brightness-levels = <0 45 63 88 119 158 203 255>;
28 pinctrl-0 = <&pinctrl_gpio_bl_on>;
30 pwms = <&pwm3 0 5000000 PWM_POLARITY_INVERTED>;
38 pinctrl-0 = <&pinctrl_usbc_det>;
44 pinctrl-0 = <&pinctrl_gpio_keys>;
59 pinctrl-0 = <&pinctrl_ipu1_lcdif>;
63 #size-cells = <0>;
65 port@0 {
66 reg = <0>;
85 reg = <0x10000000 0>;
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dmpc8548cds.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x01000000>;
44 partition@0 {
45 reg = <0x0 0x0b00000>;
50 reg = <0x0b00000 0x0400000>;
55 reg = <0x0f00000 0x060000>;
60 reg = <0x0f60000 0x020000>;
66 reg = <0x0f80000 0x080000>;
72 board-control@1,0 {
74 reg = <0x1 0x0 0x1000>;
[all …]
H A Dpq3-i2c-0.dtsi2 * PQ3 I2C device tree stub [ controller @ offset 0x3000 ]
37 #size-cells = <0>;
38 cell-index = <0>;
40 reg = <0x3000 0x100>;
41 interrupts = <43 2 0 0>;
/freebsd/sys/dev/bhnd/bhndb/
H A Dbhndb_pcireg.h36 * - PCI (cid=0x804, revision <= 12)
40 * [0x0000+0x1000] dynamic mapped backplane address space (window 0).
41 * [0x1000+0x0800] fixed SPROM shadow
42 * [0x1800+0x0E00] fixed pci core device registers
43 * [0x1E00+0x0200] fixed pci core siba config registers
47 * - PCI (cid=0x804, revision >= 13)
48 * - PCIE (cid=0x820) with ChipCommon (revision <= 31)
52 * [0x0000+0x1000] dynamic mapped backplane address space (window 0).
53 * [0x1000+0x1000] fixed SPROM shadow
54 * [0x2000+0x1000] fixed pci/pcie core registers
[all …]
H A Dbhndb_pci_hwdata.c68 sizeof(_BHNDB_HW_REQ_ARRAY(__VA_ARGS__)[0])), \
82 * at the default enumeration address (0x18000000).
86 { SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE },
87 { -1, 0, 0 }
91 /* bar0+0x0000: configurable backplane window */
99 .res = { SYS_RES_MEMORY, PCIR_BAR(0) }
119 { SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE },
120 { -1, 0, 0 }
124 /* bar0+0x0000: configurable backplane window */
132 .res = { SYS_RES_MEMORY, PCIR_BAR(0) }
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam57-pruss.dtsi11 reg = <0x4b226000 0x4>,
12 <0x4b226004 0x4>;
23 clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS1_CLKCTRL 0>;
27 ranges = <0x00000000 0x4b200000 0x80000>;
29 pruss1: pruss@0 {
31 reg = <0x0 0x80000>;
36 pruss1_mem: memories@0 {
37 reg = <0x0 0x2000>,
38 <0x2000 0x2000>,
39 <0x10000 0x8000>;
[all …]
/freebsd/usr.sbin/bhyve/amd64/
H A De820.c43 #define E820_VGA_MEM_BASE 0xA0000
44 #define E820_VGA_MEM_END 0xC0000
45 #define E820_ROM_MEM_BASE 0xC0000
46 #define E820_ROM_MEM_END 0x100000
99 i = 0; in e820_dump_table()
117 count = 0; in e820_get_fwcfg_item()
121 if (count == 0) { in e820_get_fwcfg_item()
138 i = 0; in e820_get_fwcfg_item()
189 return (0); in e820_add_entry()
199 return (0); in e820_add_entry()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/intel/ixp/
H A Dintel-ixp43x-gateworks-gw2358.dts16 memory@0 {
19 reg = <0x00000000 0x8000000>;
35 gpios = <&pld1 0 GPIO_ACTIVE_LOW>;
47 #size-cells = <0>;
51 reg = <0x28>;
55 reg = <0x68>;
59 reg = <0x51>;
66 reg = <0x56>;
73 reg = <0x57>;
81 flash@0,0 {
[all …]
/freebsd/sys/dev/mii/
H A Dxmphyreg.h42 #define XMPHY_MII_BMCR 0x00
43 #define XMPHY_BMCR_RESET 0x8000
44 #define XMPHY_BMCR_LOOP 0x4000
45 #define XMPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */
46 #define XMPHY_BMCR_PDOWN 0x0800 /* Power down */
47 #define XMPHY_BMCR_ISO 0x0400 /* Isolate */
48 #define XMPHY_BMCR_STARTNEG 0x0200 /* Restart autoneg */
49 #define XMPHY_BMCR_FDX 0x0100 /* Duplex mode */
51 #define XMPHY_MII_BMSR 0x01
52 #define XMPHY_BMSR_EXTSTS 0x0100 /* Extended status present */
[all …]
H A Dtruephyreg.h42 #define TRUEPHY_INDEX 0x10 /* XXX reserved in DS */
43 #define TRUEPHY_INDEX_MAGIC 0x402
44 #define TRUEPHY_DATA 0x11 /* XXX reserved in DS */
46 #define TRUEPHY_CTRL 0x12
47 #define TRUEPHY_CTRL_DIAG 0x0004
48 #define TRUEPHY_CTRL_RSV1 0x0002 /* XXX reserved */
49 #define TRUEPHY_CTRL_RSV0 0x0001 /* XXX reserved */
51 #define TRUEPHY_CONF 0x16
52 #define TRUEPHY_CONF_TXFIFO_MASK 0x3000
53 #define TRUEPHY_CONF_TXFIFO_8 0x0000
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Ds32g2.dtsi24 reg = <0x0 0xd0000000 0x0 0x80>;
31 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0x0>;
44 reg = <0x1>;
52 reg = <0x100>;
60 reg = <0x101>;
94 arm,smc-id = <0xc20000fe>;
96 #size-cells = <0>;
100 reg = <0x14>;
[all …]
H A Ds32g3.dtsi15 #address-cells = <0x02>;
16 #size-cells = <0x02>;
20 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0x0>;
65 clocks = <&dfs 0>;
71 reg = <0x1>;
73 clocks = <&dfs 0>;
79 reg = <0x2>;
81 clocks = <&dfs 0>;
[all …]
/freebsd/stand/userboot/userboot/
H A Delf64_freebsd.c49 #define GUEST_NULL_SEL 0
57 gdt[GUEST_NULL_SEL] = (struct user_segment_descriptor) { 0 }; in setup_freebsd_gdt()
90 if (err != 0) in elf64_exec()
98 * Build a scratch stack at physical 0x1000, page tables: in elf64_exec()
99 * PT4 at 0x2000, in elf64_exec()
100 * PT3 at 0x3000, in elf64_exec()
101 * PT2 at 0x4000, in elf64_exec()
102 * gdtr at 0x5000, in elf64_exec()
110 for (i = 0; i < 512; i++) { in elf64_exec()
112 PT4[i] = (pml4_entry_t) 0x3000; in elf64_exec()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dsprd,ums512-glbreg.yaml41 "^clock-controller@[0-9a-f]+$":
57 reg = <0x71000000 0x3000>;
60 ranges = <0 0x71000000 0x3000>;
62 clock-controller@0 {
64 reg = <0x
[all...]
/freebsd/tools/test/stress2/misc/
H A Dsyzkaller67.sh3 # panic: ASan: Invalid access, 8-byte read at 0xfffffe01fece46f8, StackMiddle(f2)
7 # db_trace_self_wrapper() at db_trace_self_wrapper+0xa5/frame 0xfffffe01fece42f0
8 # kdb_backtrace() at kdb_backtrace+0xc7/frame 0xfffffe01fece4450
9 # vpanic() at vpanic+0x1d7/frame 0xfffffe01fece4510
10 # panic() at panic+0xb5/frame 0xfffffe01fece45e0
11 # kasan_report() at kasan_report+0xdc/frame 0xfffffe01fece46b0
12 # __cap_rights_is_set() at __cap_rights_is_set+0x186/frame 0xfffffe01fece47d0
13 # fget_fcntl() at fget_fcntl+0xd7/frame 0xfffffe01fece48d0
14 # kern_fcntl() at kern_fcntl+0x602/frame 0xfffffe01fece4c10
15 # kern_fcntl_freebsd() at kern_fcntl_freebsd+0x244/frame 0xfffffe01fece4d30
[all …]
/freebsd/contrib/processor-trace/libipt/test/src/
H A Dptunit-mapped_section.c42 pt_msec_init(&msec, &sec, NULL, 0x2000ull, 0x100ull, 0x1000ull); in begin()
45 ptu_uint_eq(begin, 0x2000); in begin()
56 pt_msec_init(&msec, &sec, NULL, 0x2000ull, 0x100ull, 0x1000ull); in end()
59 ptu_uint_eq(end, 0x3000); in end()
70 pt_msec_init(&msec, &sec, NULL, 0x2000ull, 0x100ull, 0x1000ull); in offset()
73 ptu_uint_eq(offset, 0x100ull); in offset()
84 pt_msec_init(&msec, &sec, NULL, 0x2000ull, 0x100ull, 0x1000ull); in size()
87 ptu_uint_eq(size, 0x1000ull); in size()
99 asid.cr3 = 0xa00000ull; in asid()
100 asid.vmcs = 0xb00000ull; in asid()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dqcom,pcie-ep.yaml247 reg = <0x01c00000 0x3000>,
248 <0x40000000 0xf1d>,
249 <0x40000f20 0xc8>,
250 <0x40001000 0x1000>,
251 <0x40002000 0x1000>,
252 <0x01c03000 0x3000>;
266 qcom,perst-regs = <&tcsr 0xb258 0xb270>;
283 linux,pci-domain = <0>;
/freebsd/sys/arm64/include/
H A Dcmn600_reg.h34 #define CMN600_COMMON_PMU_EVENT_SEL 0x2000 /* rw */
36 #define CMN600_COMMON_PMU_EVENT_SEL_OCC_MASK (0x7UL << 32)
68 #define POR_CFGM_NODE_INFO 0x0000 /* ro */
69 #define POR_CFGM_NODE_INFO_LOGICAL_ID_MASK 0xffff00000000UL
71 #define POR_CFGM_NODE_INFO_NODE_ID_MASK 0xffff0000
73 #define POR_CFGM_NODE_INFO_NODE_TYPE_MASK 0xffff
74 #define POR_CFGM_NODE_INFO_NODE_TYPE_SHIFT 0
76 #define NODE_ID_SUB_MASK 0x3
77 #define NODE_ID_SUB_SHIFT 0
78 #define NODE_ID_PORT_MASK 0x4
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/tesla/
H A Dfsd.dtsi39 #size-cells = <0>;
88 /* Cluster 0 */
89 cpucl0_0: cpu@0 {
92 reg = <0x0 0x000>;
96 i-cache-size = <0xc000>;
99 d-cache-size = <0x8000>;
108 reg = <0x0 0x001>;
112 i-cache-size = <0xc000>;
115 d-cache-size = <0x8000>;
124 reg = <0x0 0x002>;
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dtqm5200.dts20 #size-cells = <0>;
22 PowerPC,5200@0 {
24 reg = <0>;
27 d-cache-size = <0x4000>; // L1, 16K
28 i-cache-size = <0x4000>; // L1, 16K
29 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader
35 memory@0 {
37 reg = <0x00000000 0x04000000>; // 64MB
[all …]

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