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/linux/drivers/gpu/drm/panel/
H A Dpanel-magnachip-d53e6ea8966.c74 #define MCS_ELVSS_ON 0xb1
75 #define MCS_TEMP_SWIRE 0xb2
76 #define MCS_PASSWORD_0 0xf0
77 #define MCS_PASSWORD_1 0xf1
78 #define MCS_ANALOG_PWR_CTL_0 0xf4
79 #define MCS_ANALOG_PWR_CTL_1 0xf5
80 #define MCS_GTCON_SET 0xf7
81 #define MCS_GATELESS_SIGNAL_SET 0xf8
82 #define MCS_SET_GAMMA 0xf9
91 {0x01, 0x79, 0x78, 0x8d, 0xd9, 0xdf, 0xd5, 0xcb, 0xcf, 0xc5,
[all …]
H A Dpanel-himax-hx83112a.c19 #define HX83112A_SETPOWER1 0xb1
20 #define HX83112A_SETDISP 0xb2
21 #define HX83112A_SETDRV 0xb4
22 #define HX83112A_SETEXTC 0xb9
23 #define HX83112A_SETBANK 0xbd
24 #define HX83112A_SETPTBA 0xbf
25 #define HX83112A_SETDGCLUT 0xc1
26 #define HX83112A_SETTCON 0xc7
27 #define HX83112A_SETCLOCK 0xcb
28 #define HX83112A_SETPANEL 0xcc
[all …]
H A Dpanel-boe-himax8279d.c59 gpiod_set_value(pinfo->enable_gpio, 0); in disable_gpios()
60 gpiod_set_value(pinfo->pp33_gpio, 0); in disable_gpios()
61 gpiod_set_value(pinfo->pp18_gpio, 0); in disable_gpios()
67 unsigned int i = 0; in send_mipi_cmds()
70 for (i = 0; i < pinfo->desc->on_cmds_num; i++) { in send_mipi_cmds()
74 if (err < 0) in send_mipi_cmds()
78 return 0; in send_mipi_cmds()
87 if (err < 0) { in boe_panel_disable()
92 return 0; in boe_panel_disable()
101 if (err < 0) in boe_panel_unprepare()
[all …]
/linux/drivers/ata/
H A Dpata_via.c70 VIA_BAD_PREQ = 0x01, /* Crashes if PREQ# till DDACK# set */
71 VIA_BAD_CLK66 = 0x02, /* 66 MHz clock doesn't work correctly */
72 VIA_SET_FIFO = 0x04, /* Needs to have FIFO split set */
73 VIA_NO_UNMASK = 0x08, /* Doesn't work with IRQ unmasking on */
74 VIA_BAD_ID = 0x10, /* Has wrong vendor ID (0x1107) */
75 VIA_BAD_AST = 0x20, /* Don't touch Address Setup Timing */
76 VIA_NO_ENABLES = 0x40, /* Has no enablebits */
77 VIA_SATA_PATA = 0x80, /* SATA/PATA combined configuration */
81 VIA_IDFLAG_SINGLE = (1 << 0), /* single channel controller) */
96 { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
[all …]
/linux/crypto/
H A Dtestmgr.h33 * @ksize: Length of @key in bytes (0 if no key)
103 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
211 "\x59\x0B\x95\x72\xA2\xC2\xA9\xC4\x06\x05\x9D\xC2\xAB\x2F\x1D\xAF"
234 "\x00\xBB\xF8\x2F\x09\x06\x82\xCE\x9C\x23\x38\xAC\x2B\x9D\xA8\x71"
290 "\x54\x34\xd1\xc4\x83\x09\xdf\x0f\x91\x5f\x7d\x91\x70\x2f\xd4\x13"
292 "\x13\xb4\xc1\xa1\x11\xfc\x40\x2f\x4c\x9d\xdf\x16\x76\x11\x20\x6b",
319 "\x52\x41\xF4\xDA\x7B\xB7\x59\x55\xCA\xD4\x2F\x0F\x3A\xCB\xA4\x0D"
325 "\x98\x42\xF0\x02\x00\x25\x38\xC5\x85\x69\x8A\x7D\x2F\x95\x6C\x43"
329 "\x2F\x8A\xCA\xBC\x5E\xF0\x77\xE4\x97\x98\x97\xC7\x10\x91\x7D\x2A"
347 "\x40\x96\x2F\xE5\x87\xEA\xF3\xA5\x77\x11\x67\x3C\x8D\x56\x08\xA7"
[all …]
H A Ddh.c27 memset(ctx, 0, sizeof(*ctx)); in dh_clear_ctx()
50 return (p_len < 2048) ? -EINVAL : 0; in dh_check_params_length()
52 return (p_len < 1536) ? -EINVAL : 0; in dh_check_params_length()
68 return 0; in dh_set_params()
80 if (crypto_dh_decode_key(buf, len, &params) < 0) in dh_set_secret()
83 if (dh_set_params(ctx, &params) < 0) in dh_set_secret()
90 return 0; in dh_set_secret()
113 return 0; in dh_is_pubkey_valid()
126 if (mpi_cmp_ui(y, 1) < 1 || mpi_cmp(y, ctx->p) >= 0) in dh_is_pubkey_valid()
134 val = mpi_alloc(0); in dh_is_pubkey_valid()
[all …]
/linux/lib/crypto/
H A Daesgcm.c43 * Returns: 0 on success, or -EINVAL if @keysize or @authsize contain values
60 return 0; in aesgcm_expandkey()
67 while (len > 0) { in aesgcm_ghash()
114 while (len > 0) { in aesgcm_crypt()
226 "\x2f\xcf\x0e\x24\x49\xa6\xb5\x25"
233 "\xe3\xaa\x21\x2f\x2c\x02\xa4\xe0"
248 "\x2f\xcf\x0e\x24\x49\xa6\xb5\x25"
255 "\xe3\xaa\x21\x2f\x2c\x02\xa4\xe0"
271 "\x2f\xf5\x8d\x80\x03\x39\x27\xab"
280 "\x2f\xcf\x0e\x24\x49\xa6\xb5\x25"
[all …]
/linux/arch/arm/boot/dts/st/
H A Dste-href.dtsi13 reg = <0x00000000 0x20000000>;
24 polling-delay = <0>;
25 polling-delay-passive = <0>;
40 io-channels = <&gpadc 0x02>; /* BatTemp */
43 pulldown-ohm = <0>;
44 #thermal-sensor-cells = <0>;
50 pinctrl-0 = <&u0_a_1_default>;
58 pinctrl-0 = <&u1rxtx_a_1_default>;
64 pinctrl-0 = <&u2rxtx_c_1_default>;
71 pinctrl-0 = <&i2c0_a_1_default>;
[all …]
/linux/drivers/net/wireless/mediatek/mt76/mt76x0/
H A Dinitvals_phy.h12 { MT_RF(0, 1), 0x01 },
13 { MT_RF(0, 2), 0x11 },
15 { MT_RF(0, 3), 0x73 }, /* VCO Freq Cal */
16 { MT_RF(0, 4), 0x30 }, /* R4 b<7>=1, VCO cal */
17 { MT_RF(0, 5), 0x00 },
18 { MT_RF(0, 6), 0x41 },
19 { MT_RF(0, 7), 0x00 },
20 { MT_RF(0, 8), 0x00 },
21 { MT_RF(0, 9), 0x00 },
22 { MT_RF(0, 10), 0x0C },
[all …]
/linux/drivers/usb/misc/sisusbvga/
H A Dsisusb_tables.h58 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
59 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
60 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
61 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
62 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
63 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
64 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
65 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F
69 0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
70 0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
[all …]
/linux/Documentation/hwmon/
H A Dw83627hf.rst35 Use 'init=0' to bypass initializing the chip.
56 same pins as GPIO[0:4]. Technically, the `w83627_THF_` does not support a
80 isaset -y -f 0x2e 0x87
81 isaset -y -f 0x2e 0x87
85 isaset -y 0x2e 0x2f 0x07 0x0b
87 # Set the base I/O address (to 0x290 in this example)::
89 isaset -y 0x2e 0x2f 0x60 0x02
90 isaset -y 0x2e 0x2f 0x61 0x90
94 isaset -y -f 0x2e 0xaa
96 The above sequence assumes a Super-I/O config space at 0x2e/0x2f, but
[all …]
H A Dw83793.rst10 Addresses scanned: I2C 0x2c - 0x2f
23 (default 0)
30 a certain chip. Typical usage is `force_subclients=0,0x2f,0x4a,0x4b`
31 to force the subclients of chip 0x2f on bus 0 to i2c addresses
32 0x4a and 0x4b.
77 sure bit 0 is cleared in the 6 values. And then set the pwm1 value to
102 by writing 0 to the sysfs file "intrusion0_alarm".
/linux/drivers/net/wireless/realtek/rtl818x/rtl8180/
H A Drtl8225se.c24 0x0096, 0x0076, 0x0056, 0x0036, 0x0016, 0x01f6, 0x01d6, 0x01b6,
25 0x0196, 0x0176, 0x00F7, 0x00D7, 0x00B7, 0x0097, 0x0077, 0x0057,
26 0x0037, 0x00FB, 0x00DB, 0x00BB, 0x00FF, 0x00E3, 0x00C3, 0x00A3,
27 0x0083, 0x0063, 0x0043, 0x0023, 0x0003, 0x01E3, 0x01C3, 0x01A3,
28 0x0183, 0x0163, 0x0143, 0x0123, 0x0103
32 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
33 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b,
34 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11,
35 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
36 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
[all …]
/linux/fs/nls/
H A Dnls_ascii.c17 /* 0x00*/
18 0x0000, 0x0001, 0x0002, 0x0003,
19 0x0004, 0x0005, 0x0006, 0x0007,
20 0x0008, 0x0009, 0x000a, 0x000b,
21 0x000c, 0x000d, 0x000e, 0x000f,
22 /* 0x10*/
23 0x0010, 0x0011, 0x0012, 0x0013,
24 0x0014, 0x0015, 0x0016, 0x0017,
25 0x0018, 0x0019, 0x001a, 0x001b,
26 0x001c, 0x001d, 0x001e, 0x001f,
[all …]
H A Dnls_iso8859-6.c17 /* 0x00*/
18 0x0000, 0x0001, 0x0002, 0x0003,
19 0x0004, 0x0005, 0x0006, 0x0007,
20 0x0008, 0x0009, 0x000a, 0x000b,
21 0x000c, 0x000d, 0x000e, 0x000f,
22 /* 0x10*/
23 0x0010, 0x0011, 0x0012, 0x0013,
24 0x0014, 0x0015, 0x0016, 0x0017,
25 0x0018, 0x0019, 0x001a, 0x001b,
26 0x001c, 0x001d, 0x001e, 0x001f,
[all …]
H A Dnls_cp862.c17 /* 0x00*/
18 0x0000, 0x0001, 0x0002, 0x0003,
19 0x0004, 0x0005, 0x0006, 0x0007,
20 0x0008, 0x0009, 0x000a, 0x000b,
21 0x000c, 0x000d, 0x000e, 0x000f,
22 /* 0x10*/
23 0x0010, 0x0011, 0x0012, 0x0013,
24 0x0014, 0x0015, 0x0016, 0x0017,
25 0x0018, 0x0019, 0x001a, 0x001b,
26 0x001c, 0x001d, 0x001e, 0x001f,
[all …]
H A Dnls_cp737.c17 /* 0x00*/
18 0x0000, 0x0001, 0x0002, 0x0003,
19 0x0004, 0x0005, 0x0006, 0x0007,
20 0x0008, 0x0009, 0x000a, 0x000b,
21 0x000c, 0x000d, 0x000e, 0x000f,
22 /* 0x10*/
23 0x0010, 0x0011, 0x0012, 0x0013,
24 0x0014, 0x0015, 0x0016, 0x0017,
25 0x0018, 0x0019, 0x001a, 0x001b,
26 0x001c, 0x001d, 0x001e, 0x001f,
[all …]
/linux/drivers/regulator/
H A Dhi655x-regulator.c74 unsigned int value = 0; in hi655x_is_enabled()
151 HI655X_LDO_LINEAR(LDO2, 0x72, 0x07, 0x29, 0x2a, 0x2b, 0x01,
153 HI655X_LDO(LDO7, 0x78, 0x07, 0x29, 0x2a, 0x2b, 0x06, ldo7_voltages),
154 HI655X_LDO(LDO10, 0x78, 0x07, 0x29, 0x2a, 0x2b, 0x01, ldo7_voltages),
155 HI655X_LDO_LINEAR(LDO13, 0x7e, 0x07, 0x2c, 0x2d, 0x2e, 0x04,
157 HI655X_LDO_LINEAR(LDO14, 0x7f, 0x07, 0x2c, 0x2d, 0x2e, 0x05,
159 HI655X_LDO_LINEAR(LDO15, 0x80, 0x07, 0x2c, 0x2d, 0x2e, 0x06,
161 HI655X_LDO_LINEAR(LDO17, 0x82, 0x07, 0x2f, 0x30, 0x31, 0x00,
163 HI655X_LDO(LDO19, 0x84, 0x07, 0x2f, 0x30, 0x31, 0x02, ldo19_voltages),
164 HI655X_LDO_LINEAR(LDO21, 0x86, 0x07, 0x2f, 0x30, 0x31, 0x04,
[all …]
/linux/net/wireless/certs/
H A Dsforshee.hex2 0x30, 0x82, 0x02, 0xa4, 0x30, 0x82, 0x01, 0x8c,
3 0x02, 0x09, 0x00, 0xb2, 0x8d, 0xdf, 0x47, 0xae,
4 0xf9, 0xce, 0xa7, 0x30, 0x0d, 0x06, 0x09, 0x2a,
5 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x0b,
6 0x05, 0x00, 0x30, 0x13, 0x31, 0x11, 0x30, 0x0f,
7 0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x08, 0x73,
8 0x66, 0x6f, 0x72, 0x73, 0x68, 0x65, 0x65, 0x30,
9 0x20, 0x17, 0x0d, 0x31, 0x37, 0x31, 0x30, 0x30,
10 0x36, 0x31, 0x39, 0x34, 0x30, 0x33, 0x35, 0x5a,
11 0x18, 0x0f, 0x32, 0x31, 0x31, 0x37, 0x30, 0x39,
[all …]
/linux/drivers/media/dvb-frontends/
H A Dstv0900_init.h24 { 0, 11101 }, /*C/N=-0dB*/
83 { -5, 0xCAA1 }, /*-5dBm*/
84 { -10, 0xC229 }, /*-10dBm*/
85 { -15, 0xBB08 }, /*-15dBm*/
86 { -20, 0xB4BC }, /*-20dBm*/
87 { -25, 0xAD5A }, /*-25dBm*/
88 { -30, 0xA298 }, /*-30dBm*/
89 { -35, 0x98A8 }, /*-35dBm*/
90 { -40, 0x8389 }, /*-40dBm*/
91 { -45, 0x59BE }, /*-45dBm*/
[all …]
/linux/drivers/infiniband/hw/qib/
H A Dqib_7322_regs.h35 #define QIB_7322_Revision_OFFS 0x0
36 #define QIB_7322_Revision_DEF 0x0000000002010601
37 #define QIB_7322_Revision_R_Simulator_LSB 0x3F
38 #define QIB_7322_Revision_R_Simulator_MSB 0x3F
39 #define QIB_7322_Revision_R_Simulator_RMASK 0x1
40 #define QIB_7322_Revision_R_Emulation_LSB 0x3E
41 #define QIB_7322_Revision_R_Emulation_MSB 0x3E
42 #define QIB_7322_Revision_R_Emulation_RMASK 0x1
43 #define QIB_7322_Revision_R_Emulation_Revcode_LSB 0x28
44 #define QIB_7322_Revision_R_Emulation_Revcode_MSB 0x3D
[all …]
/linux/arch/riscv/net/
H A Dbpf_jit.h32 RV_REG_ZERO = 0, /* The constant value 0 */
109 memset(area, 0, size); in bpf_fill_ill_insns()
216 return 0; in is_12b_check()
234 from = (insn > 0) ? ctx->offset[insn - 1] : ctx->prologue_len; in rv_offset()
235 to = (insn + off > 0) ? ctx->offset[insn + off - 1] : ctx->prologue_len; in rv_offset()
256 u8 imm11_5 = imm11_0 >> 5, imm4_0 = imm11_0 & 0x1f; in rv_s_insn()
264 u8 imm12 = ((imm12_1 & 0x800) >> 5) | ((imm12_1 & 0x3f0) >> 4); in rv_b_insn()
265 u8 imm4_1 = ((imm12_1 & 0xf) << 1) | ((imm12_1 & 0x400) >> 10); in rv_b_insn()
280 imm = (imm20_1 & 0x80000) | ((imm20_1 & 0x3ff) << 9) | in rv_j_insn()
281 ((imm20_1 & 0x400) >> 2) | ((imm20_1 & 0x7f800) >> 11); in rv_j_insn()
[all …]
/linux/kernel/bpf/preload/iterators/
H A Diterators.lskel-big-endian.h27 int fd = skel_link_create(prog_fd, 0, BPF_TRACE_ITER); in iterators_bpf__dump_bpf_map__attach()
29 if (fd > 0) in iterators_bpf__dump_bpf_map__attach()
38 int fd = skel_link_create(prog_fd, 0, BPF_TRACE_ITER); in iterators_bpf__dump_bpf_prog__attach()
40 if (fd > 0) in iterators_bpf__dump_bpf_prog__attach()
48 int ret = 0; in iterators_bpf__attach()
50 ret = ret < 0 ? ret : iterators_bpf__dump_bpf_map__attach(skel); in iterators_bpf__attach()
51 ret = ret < 0 ? ret : iterators_bpf__dump_bpf_prog__attach(skel); in iterators_bpf__attach()
52 return ret < 0 ? ret : 0; in iterators_bpf__attach()
96 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\ in iterators_bpf__load()
97 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\ in iterators_bpf__load()
[all …]
/linux/drivers/platform/x86/
H A Dmsi-ec.c50 .address = 0xef,
51 .offset_start = 0x8a,
52 .offset_end = 0x80,
53 .range_min = 0x8a,
54 .range_max = 0xe4,
57 .address = 0x2e,
58 .block_address = 0x2f,
62 .address = 0xbf,
66 .address = 0x98,
70 .address = 0xf2,
[all …]
/linux/drivers/ufs/host/
H A Dtc-dwc-g210.c23 * Return: 0 on success or non-zero value on failure.
28 { UIC_ARG_MIB(TX_GLOBALHIBERNATE), 0x00, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
29 { UIC_ARG_MIB(REFCLKMODE), 0x01, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
30 { UIC_ARG_MIB(CDIRECTCTRL6), 0x80, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
31 { UIC_ARG_MIB(CBDIVFACTOR), 0x08, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
32 { UIC_ARG_MIB(CBDCOCTRL5), 0x64, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
33 { UIC_ARG_MIB(CBPRGTUNING), 0x09, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
34 { UIC_ARG_MIB(RTOBSERVESELECT), 0x00, DME_LOCAL }, in tc_dwc_g210_setup_40bit_rmmi()
35 { UIC_ARG_MIB_SEL(TX_REFCLKFREQ, SELIND_LN0_TX), 0x01, in tc_dwc_g210_setup_40bit_rmmi()
37 { UIC_ARG_MIB_SEL(TX_CFGCLKFREQVAL, SELIND_LN0_TX), 0x19, in tc_dwc_g210_setup_40bit_rmmi()
[all …]

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