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/linux/arch/arm64/boot/dts/arm/
H A Dfoundation-v8-gicv2.dtsi13 reg = <0x0 0x2c001000 0 0x1000>,
14 <0x0 0x2c002000 0 0x2000>,
15 <0x0 0x2c004000 0 0x2000>,
16 <0x0 0x2c006000 0 0x2000>;
H A Dvexpress-v2f-1xv7-ca53x2.dts20 arm,hbi = <0x247>;
21 arm,vexpress,site = <0xf>;
42 #size-cells = <0>;
44 cpu@0 {
47 reg = <0 0>;
54 reg = <0 1>;
67 reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */
75 /* Chipselect 2 is physically at 0x18000000 */
79 reg = <0 0x18000000 0 0x00800000>;
87 #address-cells = <0>;
[all …]
H A Drtsm_ve-aemv8a.dts15 /memreserve/ 0x80000000 0x00010000;
39 #size-cells = <0>;
41 cpu@0 {
44 reg = <0x0 0x0>;
46 cpu-release-addr = <0x0 0x8000fff8>;
52 reg = <0x0 0x1>;
54 cpu-release-addr = <0x0 0x8000fff8>;
60 reg = <0x0 0x2>;
62 cpu-release-addr = <0x0 0x8000fff8>;
68 reg = <0x0 0x3>;
[all …]
/linux/arch/arm/boot/dts/xen/
H A Dxenvm-4.2.dts26 #size-cells = <0>;
28 cpu@0 {
31 reg = <0>;
51 reg = <0 0x80000000 0 0x08000000>;
57 #address-cells = <0>;
59 reg = <0 0x2c001000 0 0x1000>,
60 <0 0x2c002000 0 0x100>;
65 interrupts = <1 13 0xf08>,
66 <1 14 0xf08>,
67 <1 11 0xf08>,
[all …]
/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca15-tc1.dts16 arm,hbi = <0x237>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu@0 {
41 reg = <0>;
53 reg = <0 0x80000000 0 0x40000000>;
61 /* Chipselect 2 is physically at 0x18000000 */
65 reg = <0 0x18000000 0 0x00800000>;
72 reg = <0 0x2b000000 0 0x1000>;
73 interrupts = <0 85 4>;
[all …]
H A Dvexpress-v2p-ca15_a7.dts16 arm,hbi = <0x249>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu0: cpu@0 {
41 reg = <0>;
61 reg = <0x100>;
71 reg = <0x101>;
81 reg = <0x102>;
109 reg = <0 0x80000000 0 0x40000000>;
117 /* Chipselect 2 is physically at 0x18000000 */
[all …]