Searched +full:0 +full:x27200 (Results 1 – 3 of 3) sorted by relevance
20 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>;25 reg = <0 0>;33 #clock-cells = <0>;40 #clock-cells = <0>;46 #clock-cells = <0>;52 #size-cells = <0>;54 cpu0: cpu@0 {57 reg = <0x0>;115 reg = <0x8fcad000 0x40000>;120 reg = <0x8fcfd000 0x1000>;[all …]
212 #define OCTNIC_NCMD_AUTONEG_ON 0x1213 #define OCTNIC_NCMD_PHY_ON 0x2270 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()282 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()391 return 0; in lio_get_link_ksettings()425 return 0; in lio_set_link_ksettings()432 return 0; in lio_set_link_ksettings()444 memset(drvinfo, 0, sizeof(struct ethtool_drvinfo)); in lio_get_drvinfo()461 memset(drvinfo, 0, sizeof(struct ethtool_drvinfo)); in lio_get_vf_drvinfo()475 int ret = 0; in lio_send_queue_count_update()[all …]
54 * at the time it indicated completion is stored there. Returns 0 if the66 return 0; in t4_wait_op_done_val()68 if (--attempts == 0) in t4_wait_op_done_val()167 /* Reset ENABLE to 0 so reads of PCIE_CFG_SPACE_DATA won't cause a in t4_hw_pci_read_cfg4()169 * ENABLE is 0 so a simple register write is easier than a in t4_hw_pci_read_cfg4()172 t4_write_reg(adap, PCIE_CFG_SPACE_REQ_A, 0); in t4_hw_pci_read_cfg4()247 log->cursor = 0; in t4_record_mbox()249 for (i = 0; i < size / 8; i++) in t4_record_mbox()252 entry->cmd[i++] = 0; in t4_record_mbox()277 * The return value is 0 on success or a negative errno on failure. A[all …]