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/linux/Documentation/devicetree/bindings/sound/
H A Drenesas,rz-ssi.yaml65 bits[0:9] - Specifies MID/RID value of a SSI channel as below
66 MID/RID value of SSI rx0 = 0x256
67 MID/RID value of SSI tx0 = 0x255
68 MID/RID value of SSI rx1 = 0x25a
69 MID/RID value of SSI tx1 = 0x259
70 MID/RID value of SSI rt2 = 0x25f
71 MID/RID value of SSI rx3 = 0x262
72 MID/RID value of SSI tx3 = 0x261
75 bit[11] - LVL = 0, Detects based on the edge
77 bit[15] - TM = 0, Single transfer mode
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/linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
H A Dpipeline.json10 "EventCode": "0x1A0",
16 "EventCode": "0x1A1",
22 "EventCode": "0x1A2",
28 "EventCode": "0x1A3",
34 "EventCode": "0x1A4",
40 "EventCode": "0x1A5",
46 "EventCode": "0x1A6",
52 "EventCode": "0x1B4",
58 "EventCode": "0x1B5",
63 "PublicDescription": "This event counts valid cycles of L1D cache pipeline#0.",
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/linux/drivers/net/ethernet/freescale/dpaa2/
H A Ddpni-cmd.h13 #define DPNI_VER_MINOR 0
23 #define DPNI_CMDID_OPEN DPNI_CMD(0x801)
24 #define DPNI_CMDID_CLOSE DPNI_CMD(0x800)
25 #define DPNI_CMDID_CREATE DPNI_CMD(0x901)
26 #define DPNI_CMDID_DESTROY DPNI_CMD(0x900)
27 #define DPNI_CMDID_GET_API_VERSION DPNI_CMD(0xa01)
29 #define DPNI_CMDID_ENABLE DPNI_CMD(0x002)
30 #define DPNI_CMDID_DISABLE DPNI_CMD(0x003)
31 #define DPNI_CMDID_GET_ATTR DPNI_CMD(0x004)
32 #define DPNI_CMDID_RESET DPNI_CMD(0x005)
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/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmu7_ppsmc.h30 #define PPSMC_MSG_SetGBDroopSettings ((uint16_t) 0x305)
32 #define PPSMC_SWSTATE_FLAG_DC 0x01
33 #define PPSMC_SWSTATE_FLAG_UVD 0x02
34 #define PPSMC_SWSTATE_FLAG_VCE 0x04
36 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
37 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
38 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
40 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
41 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
42 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
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H A Dtonga_ppsmc.h29 #define PPSMC_SWSTATE_FLAG_DC 0x01
30 #define PPSMC_SWSTATE_FLAG_UVD 0x02
31 #define PPSMC_SWSTATE_FLAG_VCE 0x04
32 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
34 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
35 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
36 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
38 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
39 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
40 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
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H A Dfiji_ppsmc.h30 #define PPSMC_SWSTATE_FLAG_DC 0x01
31 #define PPSMC_SWSTATE_FLAG_UVD 0x02
32 #define PPSMC_SWSTATE_FLAG_VCE 0x04
34 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
35 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
36 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
38 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
39 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
40 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
42 #define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0x08
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/linux/drivers/media/i2c/
H A Dmax96714.c23 #define MAX96714_DEVICE_ID 0xc9
24 #define MAX96714F_DEVICE_ID 0xca
26 #define MAX96714_PAD_SINK 0
31 #define MAX96714_REG13 CCI_REG8(0x0d)
32 #define MAX96714_DEV_REV CCI_REG8(0x0e)
33 #define MAX96714_DEV_REV_MASK GENMASK(3, 0)
34 #define MAX96714_LINK_LOCK CCI_REG8(0x13)
36 #define MAX96714_IO_CHK0 CCI_REG8(0x38)
37 #define MAX96714_PATTERN_CLK_FREQ GENMASK(1, 0)
39 #define MAX96714_VIDEO_RX8 CCI_REG8(0x11a)
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/linux/include/uapi/linux/
H A Dinput-event-codes.h23 #define INPUT_PROP_POINTER 0x00 /* needs a pointer */
24 #define INPUT_PROP_DIRECT 0x01 /* direct input devices */
25 #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */
26 #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */
27 #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */
28 #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */
29 #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */
31 #define INPUT_PROP_MAX 0x1f
38 #define EV_SYN 0x00
39 #define EV_KEY 0x0
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/linux/include/dt-bindings/input/
H A Dlinux-event-codes.h23 #define INPUT_PROP_POINTER 0x00 /* needs a pointer */
24 #define INPUT_PROP_DIRECT 0x01 /* direct input devices */
25 #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */
26 #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */
27 #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */
28 #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */
29 #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */
31 #define INPUT_PROP_MAX 0x1f
38 #define EV_SYN 0x00
39 #define EV_KEY 0x0
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/linux/sound/drivers/opl4/
H A Dopl4_synth.c41 #define MIDI_CTL_RELEASE_TIME 0x48
42 #define MIDI_CTL_ATTACK_TIME 0x49
43 #define MIDI_CTL_DECAY_TIME 0x4b
44 #define MIDI_CTL_VIBRATO_RATE 0x4c
45 #define MIDI_CTL_VIBRATO_DEPTH 0x4d
46 #define MIDI_CTL_VIBRATO_DELAY 0x4e
52 static const s16 snd_opl4_pitch_map[0x600] = {
53 0x000,0x000,0x001,0x001,0x002,0x002,0x003,0x003,
54 0x004,0x004,0x005,0x005,0x006,0x006,0x006,0x007,
55 0x007,0x008,0x008,0x009,0x009,0x00a,0x00a,0x00b,
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/linux/drivers/net/ethernet/meta/fbnic/
H A Dfbnic_csr.h16 #define MIN_FW_MAJOR_VERSION 0
23 #define PCI_DEVICE_ID_META_FBNIC_ASIC 0x0013
29 #define FBNIC_TWD_L2_HLEN_MASK DESC_GENMASK(5, 0)
33 FBNIC_TWD_L3_TYPE_OTHER = 0,
43 FBNIC_TWD_L4_TYPE_OTHER = 0,
62 FBNIC_TWD_TYPE_META = 0,
71 #define FBNIC_TWD_TS_MASK DESC_GENMASK(39, 0)
72 #define FBNIC_TWD_ADDR_MASK DESC_GENMASK(45, 0)
76 #define FBNIC_TCD_TYPE0_HEAD0_MASK DESC_GENMASK(15, 0)
79 #define FBNIC_TCD_TYPE1_TS_MASK DESC_GENMASK(39, 0)
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/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Ddm.c17 0x081, /* 0, -12.0dB */
18 0x088, /* 1, -11.5dB */
19 0x090, /* 2, -11.0dB */
20 0x099, /* 3, -10.5dB */
21 0x0A2, /* 4, -10.0dB */
22 0x0AC, /* 5, -9.5dB */
23 0x0B6, /* 6, -9.0dB */
24 0x0C0, /* 7, -8.5dB */
25 0x0CC, /* 8, -8.0dB */
26 0x0D8, /* 9, -7.5dB */
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/linux/drivers/net/wireless/broadcom/b43/
H A Dphy_n.h11 #define B43_NPHY_BBCFG B43_PHY_N(0x001) /* BB config */
12 #define B43_NPHY_BBCFG_RSTCCA 0x4000 /* Reset CCA */
13 #define B43_NPHY_BBCFG_RSTRX 0x8000 /* Reset RX */
14 #define B43_NPHY_CHANNEL B43_PHY_N(0x005) /* Channel */
15 #define B43_NPHY_TXERR B43_PHY_N(0x007) /* TX error */
16 #define B43_NPHY_BANDCTL B43_PHY_N(0x009) /* Band control */
17 #define B43_NPHY_BANDCTL_5GHZ 0x0001 /* Use the 5GHz band */
18 #define B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */
19 #define B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */
20 #define B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */
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/linux/drivers/net/wireless/ath/ath9k/
H A Dar9003_phy.c27 #define AR9300_11NA_OFDM_SHIFT 0
38 /* level: 0 1 2 3 4 5 6 7 8 */
39 { -4, -2, 0, 2, 4, 6, 8, 10, 12 }; /* lvl 0-8, default 2 */
42 /* level: 0 1 2 3 4 5 6 7 8 */
43 { -6, -4, -2, 0, 2, 4, 6, 8 }; /* lvl 0-7, default 3 */
138 * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
142 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
146 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
151 u16 bMode, fracMode = 0, aModeRefSel = 0; in ar9003_hw_set_channel()
152 u32 freq, chan_frac, div, channelSel = 0, reg32 = 0; in ar9003_hw_set_channel()
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/linux/include/drm/display/
H A Ddrm_dp.h44 #define DP_MSA_MISC_SYNC_CLOCK (1 << 0)
46 #define DP_MSA_MISC_STEREO_NO_3D (0 << 9)
50 #define DP_MSA_MISC_6_BPC (0 << 5)
66 #define DP_MSA_MISC_COLOR_RGB _DP_MSA_MISC_COLOR(0, 0, 0, 0)
67 #define DP_MSA_MISC_COLOR_CEA_RGB _DP_MSA_MISC_COLOR(0, 0, 1, 0)
68 #define DP_MSA_MISC_COLOR_RGB_WIDE_FIXED _DP_MSA_MISC_COLOR(0, 3, 0, 0)
69 #define DP_MSA_MISC_COLOR_RGB_WIDE_FLOAT _DP_MSA_MISC_COLOR(0, 3, 0, 1)
70 #define DP_MSA_MISC_COLOR_Y_ONLY _DP_MSA_MISC_COLOR(1, 0, 0, 0)
71 #define DP_MSA_MISC_COLOR_RAW _DP_MSA_MISC_COLOR(1, 1, 0, 0)
72 #define DP_MSA_MISC_COLOR_YCBCR_422_BT601 _DP_MSA_MISC_COLOR(0, 1, 1, 0)
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/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822b.c55 efuse->lna_type_2g = map->lna_type_2g[0]; in rtw8822b_read_efuse()
56 efuse->lna_type_5g = map->lna_type_5g[0]; in rtw8822b_read_efuse()
58 efuse->country_code[0] = map->country_code[0]; in rtw8822b_read_efuse()
61 efuse->regd = map->rf_board_option & 0x7; in rtw8822b_read_efuse()
65 for (i = 0; i < 4; i++) in rtw8822b_read_efuse()
83 return 0; in rtw8822b_read_efuse()
89 rtw_write32_mask(rtwdev, 0x64, BIT(29) | BIT(28), 0x3); in rtw8822b_phy_rfe_init()
90 rtw_write32_mask(rtwdev, 0x4c, BIT(26) | BIT(25), 0x0); in rtw8822b_phy_rfe_init()
91 rtw_write32_mask(rtwdev, 0x40, BIT(2), 0x1); in rtw8822b_phy_rfe_init()
94 rtw_write32_mask(rtwdev, 0x1990, 0x3f, 0x30); in rtw8822b_phy_rfe_init()
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/linux/drivers/net/wireless/realtek/rtw89/
H A Dcore.h28 #define MASKBYTE0 0xff
29 #define MASKBYTE1 0xff00
30 #define MASKBYTE2 0xff0000
31 #define MASKBYTE3 0xff000000
32 #define MASKBYTE4 0xff00000000ULL
33 #define MASKHWORD 0xffff0000
34 #define MASKLWORD 0x0000ffff
35 #define MASKDWORD 0xffffffff
36 #define RFREG_MASK 0xfffff
37 #define INV_RF_DATA 0xffffffff
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