Home
last modified time | relevance | path

Searched +full:0 +full:x2210000 (Results 1 – 9 of 9) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls2080a-simu.dts21 reg = <0x0 0x2210000 0x0 0x100>;
22 interrupts = <0 58 0x1>;
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dnvidia,tegra186-gpio.txt109 - Bit 0 specifies polarity
110 - 0: Active-high (normal).
123 - Bits [3:0] indicate trigger type and level:
138 <0x0 0x2200000 0x0 0x10000>,
139 <0x0 0x2210000 0x0 0x10000>;
141 <0 47 IRQ_TYPE_LEVEL_HIGH>,
142 <0 50 IRQ_TYPE_LEVEL_HIGH>,
143 <0 53 IRQ_TYPE_LEVEL_HIGH>,
144 <0 56 IRQ_TYPE_LEVEL_HIGH>,
145 <0 59 IRQ_TYPE_LEVEL_HIGH>,
[all …]
H A Dnvidia,tegra186-gpio.yaml122 - Bit 0 specifies polarity
123 - 0: Active-high (normal).
137 - Bits [3:0] indicate trigger type and level:
190 reg = <0x2200000 0x10000>,
191 <0x2210000 0x10000>;
192 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>,
193 <0 50 IRQ_TYPE_LEVEL_HIGH>,
194 <0 53 IRQ_TYPE_LEVEL_HIGH>,
195 <0 56 IRQ_TYPE_LEVEL_HIGH>,
196 <0 59 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j7200-main.dtsi10 #clock-cells = <0>;
18 reg = <0x00 0x70000000 0x00 0x100000>;
21 ranges = <0x00 0x00 0x70000000 0x100000>;
23 atf-sram@0 {
24 reg = <0x00 0x20000>;
30 reg = <0x00 0x00100000 0x00 0x1c000>;
33 ranges = <0x00 0x00 0x00100000 0x1c000>;
37 reg = <0x4080 0x20>;
39 mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */
40 <0x8 0x3>, <0xc 0x3>; /* SERDES0 lane2/3 select */
[all …]
H A Dk3-j721s2-main.dtsi13 #clock-cells = <0>;
15 clock-frequency = <0>;
22 reg = <0x0 0x70000000 0x0 0x400000>;
25 ranges = <0x0 0x0 0x70000000 0x400000>;
27 atf-sram@0 {
28 reg = <0x0 0x20000>;
32 reg = <0x1f0000 0x10000>;
36 reg = <0x200000 0x200000>;
42 reg = <0x00 0x00104000 0x00 0x18000>;
45 ranges = <0x00 0x00 0x00104000 0x18000>;
[all …]
H A Dk3-j721e-main.dtsi15 #clock-cells = <0>;
17 clock-frequency = <0>;
21 #clock-cells = <0>;
23 clock-frequency = <0>;
30 reg = <0x0 0x70000000 0x0 0x800000>;
33 ranges = <0x0 0x0 0x70000000 0x800000>;
35 atf-sram@0 {
36 reg = <0x0 0x20000>;
42 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */
45 ranges = <0x0 0x0 0x00100000 0x1c000>;
[all …]
H A Dk3-j784s4-main.dtsi16 #clock-cells = <0>;
26 reg = <0x00 0x70000000 0x00 0x800000>;
29 ranges = <0x00 0x00 0x70000000 0x800000>;
31 atf-sram@0 {
32 reg = <0x00 0x20000>;
36 reg = <0x1f0000 0x10000>;
40 reg = <0x200000 0x200000>;
46 reg = <0x00 0x00100000 0x00 0x1c000>;
49 ranges = <0x00 0x00 0x00100000 0x1c000>;
53 reg = <0x4034 0x4>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra186.dtsi20 reg = <0x0 0x00100000 0x0 0xf000>,
21 <0x0 0x0010f000 0x0 0x1000>;
27 reg = <0x0 0x220000
[all...]
H A Dtegra194.dtsi20 bus@0 {
25 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
29 reg = <0x0 0x00100000 0x
[all...]