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/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Dmarvell,armada-370-xp-timer.txt31 reg = <0x20300 0x30>, <0x21040 0x30>;
40 reg = <0x20300 0x30>, <0x21040 0x30>;
H A Dmarvell,armada-370-timer.yaml33 - description: Global timer interrupt 0
84 reg = <0x20300 0x30>, <0x21040 0x30>;
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-370-xp.dtsi29 #size-cells = <0>;
30 cpu@0 {
33 reg = <0>;
47 pcie-mem-aperture = <0xf8000000 0x7e00000>;
48 pcie-io-aperture = <0xffe00000 0x100000>;
52 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
53 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
56 clocks = <&coreclk 0>;
62 reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
63 ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
[all …]
H A Darmada-39x.dtsi32 #size-cells = <0>;
35 cpu@0 {
38 reg = <0>;
59 pcie-mem-aperture = <0xe0000000 0x8000000>;
60 pcie-io-aperture = <0xe8000000 0x100000>;
64 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
71 ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
75 reg = <0x8000 0x1000>;
78 arm,double-linefill-incr = <0>;
79 arm,double-linefill-wrap = <0>;
[all …]
H A Darmada-375.dtsi36 #clock-cells = <0>;
42 #clock-cells = <0>;
49 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0>;
75 pcie-mem-aperture = <0xe0000000 0x8000000>;
76 pcie-io-aperture = <0xe8000000 0x100000>;
80 reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
85 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
86 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
[all …]
H A Darmada-38x.dtsi42 pcie-mem-aperture = <0xe0000000 0x8000000>;
43 pcie-io-aperture = <0xe8000000 0x100000>;
47 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
52 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
53 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
56 clocks = <&coreclk 0>;
62 reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
63 ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
66 clocks = <&coreclk 0>;
72 reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
[all …]
/freebsd/sys/dev/bce/
H A Dif_bcefw.h40 int bce_COM_b06FwReleaseMajor = 0x6;
41 int bce_COM_b06FwReleaseMinor = 0x0;
42 int bce_COM_b06FwReleaseFix = 0xf;
43 u32 bce_COM_b06FwStartAddr = 0x08000118;
44 u32 bce_COM_b06FwTextAddr = 0x08000000;
45 int bce_COM_b06FwTextLen = 0x4a68;
46 u32 bce_COM_b06FwDataAddr = 0x00000000;
47 int bce_COM_b06FwDataLen = 0x0;
48 u32 bce_COM_b06FwRodataAddr = 0x08004a68;
49 int bce_COM_b06FwRodataLen = 0x14;
[all …]
/freebsd/sys/dev/ti/
H A Dti_fw2.h6 static int tigon2FwReleaseMajor = 0xc;
7 static int tigon2FwReleaseMinor = 0x4;
8 static int tigon2FwReleaseFix = 0xb;
9 static u_int32_t tigon2FwStartAddr = 0x00004000;
10 static u_int32_t tigon2FwTextAddr = 0x00004000;
11 int tigon2FwTextLen = 0x132f8;
12 static u_int32_t tigon2FwRodataAddr = 0x000172f8;
13 int tigon2FwRodataLen = 0x10da;
14 static u_int32_t tigon2FwDataAddr = 0x000185c0;
15 int tigon2FwDataLen = 0x17c;
[all …]
/freebsd/sys/dev/cxgbe/common/
H A Dt4_hw.c45 } while (0)
59 * at the time it indicated completion is stored there. Returns 0 if the
71 return 0; in t4_wait_op_done_val()
73 if (--attempts == 0) in t4_wait_op_done_val()
98 * and stores the value in @valp if it is not NULL. Returns 0 if the
111 return 0; in t7_wait_sram_done()
114 if (--attempts == 0) in t7_wait_sram_done()
213 * Reset F_ENABLE to 0 so reads of PCIE_CFG_SPACE_DATA won't cause a in t4_hw_pci_read_cfg4()
215 * F_ENABLE is 0 so a simple register write is easier than a in t4_hw_pci_read_cfg4()
218 t4_write_reg(adap, A_PCIE_CFG_SPACE_REQ, 0); in t4_hw_pci_read_cfg4()
[all …]
/freebsd/usr.sbin/cxgbetool/
H A Dreg_defs_t4.c5 { "SGE_PF_KDOORBELL", 0x1e000, 0 },
8 { "PIDX", 0, 14 },
9 { "SGE_PF_GTS", 0x1e004, 0 },
13 { "CIDXInc", 0, 12 },
14 { "SGE_PF_KDOORBELL", 0x1e400, 0 },
17 { "PIDX", 0, 14 },
18 { "SGE_PF_GTS", 0x1e404, 0 },
22 { "CIDXInc", 0, 12 },
23 { "SGE_PF_KDOORBELL", 0x1e800, 0 },
26 { "PIDX", 0, 14 },
[all …]