Searched +full:0 +full:x2040000 (Results 1 – 6 of 6) sorted by relevance
74 reg = <0x1f059000 0x1000>,75 <0x1d000000 0x2040000>;
23 #size-cells = <0>;25 cpu0: cpu@0 {28 reg = <0x0>;30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;31 i-cache-size = <0xc000>;34 d-cache-size = <0x8000>;45 reg = <0x1>;47 clocks = <&clockgen QORIQ_CLK_CMUX 0>;48 i-cache-size = <0xc000>;51 d-cache-size = <0x8000>;[all …]
12 /memreserve/ 0x80000000 0x00010000;26 #size-cells = <0>;29 cpu0: cpu@0 {33 reg = <0x0>;34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;35 d-cache-size = <0x8000>;38 i-cache-size = <0xC000>;50 reg = <0x1>;51 clocks = <&clockgen QORIQ_CLK_CMUX 0>;52 d-cache-size = <0x8000>;[all …]
10 #clock-cells = <0>;18 reg = <0x00 0x70000000 0x00 0x100000>;21 ranges = <0x00 0x00 0x70000000 0x100000>;23 atf-sram@0 {24 reg = <0x00 0x20000>;30 reg = <0x00 0x00100000 0x00 0x1c000>;33 ranges = <0x00 0x00 0x00100000 0x1c000>;37 reg = <0x4080 0x20>;39 mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */40 <0x8 0x3>, <0xc 0x3>; /* SERDES0 lane2/3 select */[all …]
15 #clock-cells = <0>;17 clock-frequency = <0>;21 #clock-cells = <0>;23 clock-frequency = <0>;30 reg = <0x0 0x70000000 0x0 0x800000>;33 ranges = <0x0 0x0 0x70000000 0x800000>;35 atf-sram@0 {36 reg = <0x0 0x20000>;42 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */45 ranges = <0x0 0x0 0x00100000 0x1c000>;[all …]
37 * Generated by: IDF:x 1.3.056 #define ATV_COMM_EXEC__A 0xC0000058 #define ATV_COMM_EXEC__M 0x359 #define ATV_COMM_EXEC__PRE 0x060 #define ATV_COMM_EXEC_STOP 0x061 #define ATV_COMM_EXEC_ACTIVE 0x162 #define ATV_COMM_EXEC_HOLD 0x264 #define ATV_COMM_STATE__A 0xC0000166 #define ATV_COMM_STATE__M 0xFFFF67 #define ATV_COMM_STATE__PRE 0x0[all …]