Searched +full:0 +full:x20110 (Results 1 – 8 of 8) sorted by relevance
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | marvell,orion-bridge-intc.yaml | 46 reg = <0x20110 0x8>; 49 interrupts = <0>;
|
| /linux/arch/arm/boot/dts/marvell/ |
| H A D | orion5x.dtsi | 24 reg = <MBUS_ID(0xf0, 0x01) 0x1046C 0x4>; 25 ranges = <0 MBUS_ID(0x01, 0x0f) 0 0xffffffff>; 28 clocks = <&core_clk 0>; 34 reg = <MBUS_ID(0xf0, 0x01) 0x1045C 0x4>; 35 ranges = <0 MBUS_ID(0x01, 0x1e) 0 0xffffffff>; 38 clocks = <&core_clk 0>; 44 reg = <MBUS_ID(0xf0, 0x01) 0x10460 0x4>; 45 ranges = <0 MBUS_ID(0x01, 0x1d) 0 0xffffffff>; 48 clocks = <&core_clk 0>; 54 reg = <MBUS_ID(0xf0, 0x01) 0x10464 0x4>; [all …]
|
| H A D | kirkwood.dtsi | 15 #size-cells = <0>; 17 cpu@0 { 20 reg = <0>; 37 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 /* internal-regs */ 38 MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000 /* nand flash */ 39 MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000 /* crypto sram */ 42 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */ 43 pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */ 48 cle = <0>; 52 reg = <MBUS_ID(0x01, 0x2f) 0 0x400>; [all …]
|
| H A D | dove.dtsi | 22 #size-cells = <0>; 24 cpu0: cpu@0 { 28 reg = <0>; 34 marvell,tauros2-cache-features = <0>; 46 #size-cells = <0>; 51 pinctrl-0 = <&pmx_i2cmux_0>; 55 i2c0: i2c@0 { 56 reg = <0>; 58 #size-cells = <0>; 65 #size-cells = <0>; [all …]
|
| /linux/drivers/net/ethernet/cavium/thunder/ |
| H A D | thunder_bgx.h | 10 #define PCI_DEVICE_ID_THUNDER_BGX 0xA026 11 #define PCI_DEVICE_ID_THUNDER_RGX 0xA054 14 #define PCI_SUBSYS_DEVID_88XX_BGX 0xA126 15 #define PCI_SUBSYS_DEVID_81XX_BGX 0xA226 16 #define PCI_SUBSYS_DEVID_81XX_RGX 0xA254 17 #define PCI_SUBSYS_DEVID_83XX_BGX 0xA326 27 #define DEFAULT_PAUSE_TIME 0xFFFF 29 #define BGX_ID_MASK 0x3 30 #define LMAC_ID_MASK 0x3 35 #define BGX_CMRX_CFG 0x00 [all …]
|
| /linux/arch/arm64/boot/dts/apple/ |
| H A D | s5l8960x-pmgr.dtsi | 11 reg = <0x20000 4>; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 20 reg = <0x20008 4>; 21 #power-domain-cells = <0>; 22 #reset-cells = <0>; 29 reg = <0x200f0 4>; 30 #power-domain-cells = <0>; 31 #reset-cells = <0>; 38 reg = <0x200f8 4>; [all …]
|
| H A D | t7001-pmgr.dtsi | 11 reg = <0x20000 4>; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 20 reg = <0x20008 4>; 21 #power-domain-cells = <0>; 22 #reset-cells = <0>; 29 reg = <0x20010 4>; 30 #power-domain-cells = <0>; 31 #reset-cells = <0>; 38 reg = <0x20040 4>; [all …]
|
| H A D | t7000-pmgr.dtsi | 10 reg = <0x20000 4>; 11 #power-domain-cells = <0>; 12 #reset-cells = <0>; 19 reg = <0x20008 4>; 20 #power-domain-cells = <0>; 21 #reset-cells = <0>; 28 reg = <0x20040 4>; 29 #power-domain-cells = <0>; 30 #reset-cells = <0>; 37 reg = <0x201f8 4>; [all …]
|