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/linux/drivers/gpu/drm/msm/dsi/
H A Ddsi_cfg.h11 #define MSM_DSI_VER_MAJOR_V2 0x02
12 #define MSM_DSI_VER_MAJOR_6G 0x03
13 #define MSM_DSI_6G_VER_MINOR_V1_0 0x10000000
14 #define MSM_DSI_6G_VER_MINOR_V1_0_2 0x10000002
15 #define MSM_DSI_6G_VER_MINOR_V1_1 0x10010000
16 #define MSM_DSI_6G_VER_MINOR_V1_1_1 0x10010001
17 #define MSM_DSI_6G_VER_MINOR_V1_2 0x10020000
18 #define MSM_DSI_6G_VER_MINOR_V1_3 0x10030000
19 #define MSM_DSI_6G_VER_MINOR_V1_3_1 0x10030001
20 #define MSM_DSI_6G_VER_MINOR_V1_4_1 0x10040001
[all …]
/linux/Documentation/devicetree/bindings/arm/
H A Darm,coresight-tmc.yaml80 burst size can be in the range [0..15], the setting supports one data
117 reg = <0x20070000 0x1000>;
/linux/arch/arm/boot/dts/rockchip/
H A Drk3xxx.dtsi39 #clock-cells = <0>;
45 reg = <0x10090000 0x10000>;
56 reg = <0x10104000 0x800>;
68 reg = <0x10138000 0x1000>;
75 reg = <0x1013c000 0x100>;
80 reg = <0x1013c200 0x20>;
94 reg = <0x1013c600 0x20>;
103 reg = <0x1013d000 0x1000>,
104 <0x1013c100 0x0100>;
109 reg = <0x10124000 0x400>;
[all …]
/linux/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi12 reg = <0x0 0x2a810000 0x0 0x10000>;
16 ranges = <0 0x0 0x2a820000 0x20000>;
21 reg = <0x10000 0x10000>;
27 reg = <0x0 0x2b1f0000 0x0 0x1000>;
38 reg = <0x0 0x2b400000 0x0 0x10000>;
50 reg = <0x0 0x2b500000 0x0 0x10000>;
61 reg = <0x0 0x2b600000 0x0 0x10000>;
67 power-domains = <&scpi_devpd 0>;
72 reg = <0x0 0x2c010000 0 0x1000>,
73 <0x0 0x2c02f000 0 0x2000>,
[all …]
/linux/arch/arc/net/
H A Dbpf_jit_arcv2.c91 #define REG_LO(r) (bpf2arc[(r)][0])
110 ZZ_4_byte = 0,
126 AA_none = 0,
134 X_zero = 0,
140 CC_always = 0, /* condition is true all the time */
155 #define IN_U6_RANGE(x) ((x) <= (0x40 - 1) && (x) >= 0)
156 #define IN_S9_RANGE(x) ((x) <= (0x100 - 1) && (x) >= -0x100)
157 #define IN_S12_RANGE(x) ((x) <= (0x800 - 1) && (x) >= -0x800)
158 #define IN_S21_RANGE(x) ((x) <= (0x100000 - 1) && (x) >= -0x100000)
159 #define IN_S25_RANGE(x) ((x) <= (0x1000000 - 1) && (x) >= -0x1000000)
[all …]