Searched +full:0 +full:x20064000 (Results 1 – 5 of 5) sorted by relevance
6 muxing options with option 0 being the use as a GPIO.59 The MUX 0 means gpio and MUX 1 to N mean the specific device function.79 reg = <0x20034000 0x100>;106 reg = <0x20064000 0x400>;113 pinctrl-0 = <&uart2_xfer>;
16 options with option 0 being used as a GPIO.84 "gpio@[0-9a-f]+$":104 minimum: 0129 - minimum: 0133 - minimum: 0137 - minimum: 0140 Mux 0 means GPIO and mux 1 to N means161 reg = <0x20034000 0x100>;186 reg = <0x20064000 0x400>;189 pinctrl-0 = <&uart2_xfer>;
39 #clock-cells = <0>;45 reg = <0x10090000 0x10000>;56 reg = <0x10104000 0x800>;68 reg = <0x10138000 0x1000>;75 reg = <0x1013c000 0x100>;80 reg = <0x1013c200 0x20>;94 reg = <0x1013c600 0x20>;103 reg = <0x1013d000 0x1000>,104 <0x1013c100 0x0100>;109 reg = <0x10124000 0x400>;[all …]
37 #size-cells = <0>;43 reg = <0xf00>;56 reg = <0xf01>;87 #clock-cells = <0>;92 reg = <0x10080000 0x2000>;95 ranges = <0 0x10080000 0x2000>;97 smp-sram@0 {99 reg = <0x00 0x10>;105 reg = <0x10090000 0x10000>;125 reg = <0x10108000 0x800>;[all …]
44 #size-cells = <0>;50 reg = <0xf00>;60 reg = <0xf01>;68 reg = <0xf02>;76 reg = <0xf03>;82 cpu_opp_table: opp-table-0 {165 #clock-cells = <0>;170 reg = <0x10080000 0x2000>;173 ranges = <0 0x10080000 0x2000>;175 smp-sram@0 {[all …]