| /freebsd/contrib/bearssl/src/symcipher/ |
| H A D | des_tab.c | 30 * order (rightmost bit is 0).
36 4, 14, 18, 8, 17, 0, 19
46 24, 7, 13, 0, 21, 17, 1
53 0x00808200, 0x00000000, 0x00008000, 0x00808202,
54 0x00808002, 0x00008202, 0x00000002, 0x00008000,
55 0x00000200, 0x00808200, 0x00808202, 0x00000200,
56 0x00800202, 0x00808002, 0x00800000, 0x00000002,
57 0x00000202, 0x00800200, 0x00800200, 0x00008200,
58 0x00008200, 0x00808000, 0x00808000, 0x00800202,
59 0x00008002, 0x00800002, 0x00800002, 0x00008002,
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/nvmem/ |
| H A D | lpc1857-eeprom.txt | 21 reg = <0x4000e000 0x1000>,
22 <0x20040000 0x4000>;
|
| /freebsd/sys/dev/rtwn/rtl8812a/ |
| H A D | r12a_calib.c | 72 if ((txmode & 0x07) != 0) { in r12a_lc_calib()
84 rtwn_rf_setbits(sc, 0, R12A_RF_LCK, 0, R12A_RF_LCK_MODE); in r12a_lc_calib()
87 chnlbw = rtwn_rf_read(sc, 0, R92C_RF_CHNLBW); in r12a_lc_calib()
88 rtwn_rf_write(sc, 0, R92C_RF_CHNLBW, chnlbw | R92C_RF_CHNLBW_LCSTART); in r12a_lc_calib()
94 rtwn_rf_setbits(sc, 0, R12A_RF_LCK, R12A_RF_LCK_MODE, 0); in r12a_lc_calib()
97 if ((txmode & 0x07) != 0) { in r12a_lc_calib()
105 rtwn_write_1(sc, R92C_TXPAUSE, 0); in r12a_lc_calib()
109 rtwn_rf_write(sc, 0, R92C_RF_CHNLBW, chnlbw); in r12a_lc_calib()
119 if (sc->fwver == 0x19) in r12a_iq_calib_fw_supported()
122 return (0); in r12a_iq_calib_fw_supported()
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/arm/ |
| H A D | arm,coresight-dynamic-funnel.yaml | 64 '^port(@[0-7])?$':
91 reg = <0x20040000 0x1000>;
105 #size-cells = <0>;
107 port@0 {
108 reg = <0>;
|
| H A D | coresight.txt | 131 AXI master interface. The burst size can be in the range [0..15],
164 reg = <0 0x20010000 0 0x1000>;
170 etb_in_port: endpoint@0 {
179 reg = <0 0x20030000 0 0x1000>;
185 tpiu_in_port: endpoint@0 {
194 reg = <0 0x20070000 0 0x1000>;
224 #size-cells = <0>;
227 port@0 {
228 reg = <0>;
270 #size-cells = <0>;
[all …]
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| /freebsd/sys/dev/rtwn/rtl8821a/ |
| H A D | r21a_calib.c | 66 if (sc->fwver == 0x16) in r21a_iq_calib_fw_supported()
69 return (0); in r21a_iq_calib_fw_supported()
108 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0, 0x80000000); in r21a_iq_calib_sw()
110 rtwn_bb_write(sc, R12A_SLEEP_NAV(0), 0); in r21a_iq_calib_sw()
111 rtwn_bb_write(sc, R12A_PMPD(0), 0); in r21a_iq_calib_sw()
112 rtwn_bb_write(sc, 0xc88, 0); in r21a_iq_calib_sw()
113 rtwn_bb_write(sc, 0xc8c, 0x3c000000); in r21a_iq_calib_sw()
114 rtwn_bb_write(sc, 0xc90, 0x80); in r21a_iq_calib_sw()
115 rtwn_bb_write(sc, 0xc94, 0); in r21a_iq_calib_sw()
116 rtwn_bb_write(sc, 0xcc4, 0x20040000); in r21a_iq_calib_sw()
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm/arm/ |
| H A D | vexpress-v2p-ca15_a7.dts | 16 arm,hbi = <0x249>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu0: cpu@0 {
41 reg = <0>;
61 reg = <0x100>;
71 reg = <0x101>;
81 reg = <0x102>;
109 reg = <0 0x80000000 0 0x40000000>;
117 /* Chipselect 2 is physically at 0x18000000 */
[all …]
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| /freebsd/sys/contrib/device-tree/src/arm/nxp/lpc/ |
| H A D | lpc18xx.dtsi | 19 #define LPC_PIN(port, pin) (0x##port * 32 + pin)
28 #size-cells = <0>;
30 cpu@0 {
33 reg = <0x0>;
41 #clock-cells = <0>;
47 #clock-cells = <0>;
53 #clock-cells = <0>;
54 clock-frequency = <0>;
60 #clock-cells = <0>;
61 clock-frequency = <0>;
[all...] |
| /freebsd/sys/contrib/device-tree/src/arm64/arm/ |
| H A D | juno-base.dtsi | 12 reg = <0x0 0x2a810000 0x0 0x10000>;
16 ranges = <0 0x0 0x2a820000 0x20000>;
21 reg = <0x10000 0x10000>;
27 reg = <0x0 0x2b1f0000 0x0 0x1000>;
38 reg = <0x0 0x2b400000 0x0 0x10000>;
50 reg = <0x0 0x2b500000 0x0 0x10000>;
61 reg = <0x0 0x2b600000 0x0 0x10000>;
67 power-domains = <&scpi_devpd 0>;
72 reg = <0x0 0x2c010000 0 0x1000>,
73 <0x0 0x2c02f000 0 0x2000>,
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm/rockchip/ |
| H A D | rv1108.dtsi | 29 #size-cells = <0>;
34 reg = <0xf00>;
43 cpu_opp_table: opp-table-0 {
85 #clock-cells = <0>;
90 reg = <0x10080000 0x2000>;
93 ranges = <0 0x10080000 0x2000>;
98 reg = <0x1021000
[all...] |
| /freebsd/tools/test/iconv/ref/ |
| H A D | UTF-32BE-rev | 1 0x00 = 0x00000000
2 0x01 = 0x01000000
3 0x02 = 0x02000000
4 0x03 = 0x03000000
5 0x04 = 0x04000000
6 0x05 = 0x05000000
7 0x06 = 0x06000000
8 0x07 = 0x07000000
9 0x08 = 0x08000000
10 0x09 = 0x09000000
[all …]
|