Searched +full:0 +full:x20034000 (Results 1 – 7 of 7) sorted by relevance
16 - pinctrl-0, pinctrl-name:22 reg = <0x20034000 0x4000>;27 pinctrl-0 = <&hdmi_ctl>;31 #size-cells = <0>;32 hdmi_in_lcdc: endpoint@0 {33 reg = <0>;
41 const: 047 port@0:58 - port@067 - pinctrl-0107 reg = <0x20034000 0x4000>;112 pinctrl-0 = <&hdmi_ctl>;113 #sound-dai-cells = <0>;117 #size-cells = <0>;119 hdmi_in: port@0 {120 reg = <0>;
6 muxing options with option 0 being the use as a GPIO.59 The MUX 0 means gpio and MUX 1 to N mean the specific device function.79 reg = <0x20034000 0x100>;106 reg = <0x20064000 0x400>;113 pinctrl-0 = <&uart2_xfer>;
16 options with option 0 being used as a GPIO.82 "gpio@[0-9a-f]+$":102 minimum: 0127 - minimum: 0131 - minimum: 0135 - minimum: 0138 Mux 0 means GPIO and mux 1 to N means159 reg = <0x20034000 0x100>;184 reg = <0x20064000 0x400>;187 pinctrl-0 = <&uart2_xfer>;
23 #size-cells = <0>;26 cpu0: cpu@0 {30 reg = <0x0>;47 reg = <0x1>;74 reg = <0x10080000 0x10000>;77 ranges = <0 0x10080000 0x10000>;79 smp-sram@0 {81 reg = <0x0 0x50>;87 reg = <0x1010c000 0x19c>;102 #size-cells = <0>;[all …]
37 #size-cells = <0>;43 reg = <0xf00>;56 reg = <0xf01>;87 #clock-cells = <0>;92 reg = <0x10080000 0x2000>;95 ranges = <0 0x10080000 0x2000>;97 smp-sram@0 {99 reg = <0x00 0x10>;105 reg = <0x10090000 0x10000>;125 reg = <0x10108000 0x800>;[all …]
44 #size-cells = <0>;50 reg = <0xf00>;61 reg = <0xf01>;69 reg = <0xf02>;77 reg = <0xf03>;83 cpu_opp_table: opp-table-0 {159 #clock-cells = <0>;164 reg = <0x10080000 0x2000>;167 ranges = <0 0x10080000 0x2000>;169 smp-sram@0 {[all …]