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/linux/sound/hda/codecs/helpers/
H A Dideapad_s740.c5 { 0x20, AC_VERB_SET_COEF_INDEX, 0x10 },
6 { 0x20, AC_VERB_SET_PROC_COEF, 0x0320 },
7 { 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
8 { 0x20, AC_VERB_SET_PROC_COEF, 0x0041 },
9 { 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
10 { 0x20, AC_VERB_SET_PROC_COEF, 0x0041 },
11 { 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
12 { 0x20, AC_VERB_SET_COEF_INDEX, 0x29 },
13 { 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
14 { 0x20, AC_VERB_SET_PROC_COEF, 0x0000 },
[all …]
/linux/drivers/video/fbdev/sis/
H A Doem300.h55 {0x08,0x08,0x08,0x08},
56 {0x08,0x08,0x08,0x08},
57 {0x08,0x08,0x08,0x08},
58 {0x2c,0x2c,0x2c,0x2c},
59 {0x08,0x08,0x08,0x08},
60 {0x08,0x08,0x08,0x08},
61 {0x08,0x08,0x08,0x08},
62 {0x20,0x20,0x20,0x20}
67 {0x20,0x20,0x20,0x20},
68 {0x20,0x20,0x20,0x20},
[all …]
/linux/drivers/hid/
H A Dhid-debug.c40 { 0x00, 0, "Undefined" },
41 { 0x01, 0, "GenericDesktop" },
42 { 0x01, 0x0001, "Pointer" },
43 { 0x01, 0x0002, "Mouse" },
44 { 0x01, 0x0004, "Joystick" },
45 { 0x01, 0x0005, "Gamepad" },
46 { 0x01, 0x0006, "Keyboard" },
47 { 0x01, 0x0007, "Keypad" },
48 { 0x01, 0x0008, "MultiaxisController" },
49 { 0x01, 0x0009, "TabletPCSystemControls" },
[all …]
/linux/kernel/bpf/preload/iterators/
H A Diterators.lskel-big-endian.h27 int fd = skel_link_create(prog_fd, 0, BPF_TRACE_ITER); in iterators_bpf__dump_bpf_map__attach()
29 if (fd > 0) in iterators_bpf__dump_bpf_map__attach()
38 int fd = skel_link_create(prog_fd, 0, BPF_TRACE_ITER); in iterators_bpf__dump_bpf_prog__attach()
40 if (fd > 0) in iterators_bpf__dump_bpf_prog__attach()
48 int ret = 0; in iterators_bpf__attach()
50 ret = ret < 0 ? ret : iterators_bpf__dump_bpf_map__attach(skel); in iterators_bpf__attach()
51 ret = ret < 0 ? ret : iterators_bpf__dump_bpf_prog__attach(skel); in iterators_bpf__attach()
52 return ret < 0 ? ret : 0; in iterators_bpf__attach()
93 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\ in iterators_bpf__load()
94 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\ in iterators_bpf__load()
[all …]
H A Diterators.lskel-little-endian.h27 int fd = skel_link_create(prog_fd, 0, BPF_TRACE_ITER); in iterators_bpf__dump_bpf_map__attach()
29 if (fd > 0) in iterators_bpf__dump_bpf_map__attach()
38 int fd = skel_link_create(prog_fd, 0, BPF_TRACE_ITER); in iterators_bpf__dump_bpf_prog__attach()
40 if (fd > 0) in iterators_bpf__dump_bpf_prog__attach()
48 int ret = 0; in iterators_bpf__attach()
50 ret = ret < 0 ? ret : iterators_bpf__dump_bpf_map__attach(skel); in iterators_bpf__attach()
51 ret = ret < 0 ? ret : iterators_bpf__dump_bpf_prog__attach(skel); in iterators_bpf__attach()
52 return ret < 0 ? ret : 0; in iterators_bpf__attach()
96 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\ in iterators_bpf__load()
97 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\ in iterators_bpf__load()
[all …]
/linux/drivers/staging/media/meson/vdec/
H A Dcodec_h264.c15 #define SIZE_WORKSPACE 0x1ee000
22 #define WORKSPACE_BUF_OFFSET 0x1000000
25 #define CMD_MASK GENMASK(7, 0)
43 #define PIC_STRUCT_MASK GENMASK(2, 0)
44 #define BUF_IDX_MASK GENMASK(4, 0)
47 #define OFFSET_MASK GENMASK(15, 0)
51 #define MB_TOTAL_MASK GENMASK(15, 0)
52 #define MB_WIDTH_MASK GENMASK(7, 0)
54 #define MAX_REF_MASK GENMASK(6, 0)
56 #define AR_IDC_MASK GENMASK(7, 0)
[all …]
/linux/drivers/net/ethernet/microchip/
H A Denc28j60_hw.h15 * - Register address (bits 0-4)
19 #define ADDR_MASK 0x1F
20 #define BANK_MASK 0x60
21 #define SPRD_MASK 0x80
23 #define EIE 0x1B
24 #define EIR 0x1C
25 #define ESTAT 0x1D
26 #define ECON2 0x1E
27 #define ECON1 0x1F
28 /* Bank 0 registers */
[all …]
/linux/drivers/scsi/aic7xxx/
H A Daic79xx_reg_print.c_shipped12 { "SPLTINT", 0x01, 0x01 },
13 { "CMDCMPLT", 0x02, 0x02 },
14 { "SEQINT", 0x04, 0x04 },
15 { "SCSIINT", 0x08, 0x08 },
16 { "PCIINT", 0x10, 0x10 },
17 { "SWTMINT", 0x20, 0x20 },
18 { "BRKADRINT", 0x40, 0x40 },
19 { "HWERRINT", 0x80, 0x80 },
20 { "INT_PEND", 0xff, 0xff }
27 0x01, regvalue, cur_col, wrap));
[all …]
H A Daic7xxx_reg_print.c_shipped12 { "SCSIRSTO", 0x01, 0x01 },
13 { "ENAUTOATNP", 0x02, 0x02 },
14 { "ENAUTOATNI", 0x04, 0x04 },
15 { "ENAUTOATNO", 0x08, 0x08 },
16 { "ENRSELI", 0x10, 0x10 },
17 { "ENSELI", 0x20, 0x20 },
18 { "ENSELO", 0x40, 0x40 },
19 { "TEMODE", 0x80, 0x80 }
26 0x00, regvalue, cur_col, wrap));
30 { "CLRCHN", 0x02, 0x02 },
[all …]
H A Daic7xxx_reg.h_shipped19 ahc_print_register(NULL, 0, "SCSISEQ", 0x00, regvalue, cur_col, wrap)
26 ahc_print_register(NULL, 0, "SXFRCTL0", 0x01, regvalue, cur_col, wrap)
33 ahc_print_register(NULL, 0, "SCSISIGI", 0x03, regvalue, cur_col, wrap)
40 ahc_print_register(NULL, 0, "SCSIRATE", 0x04, regvalue, cur_col, wrap)
47 ahc_print_register(NULL, 0, "SSTAT0", 0x0b, regvalue, cur_col, wrap)
54 ahc_print_register(NULL, 0, "SSTAT1", 0x0c, regvalue, cur_col, wrap)
61 ahc_print_register(NULL, 0, "SSTAT2", 0x0d, regvalue, cur_col, wrap)
68 ahc_print_register(NULL, 0, "SSTAT3", 0x0e, regvalue, cur_col, wrap)
75 ahc_print_register(NULL, 0, "SIMODE0", 0x10, regvalue, cur_col, wrap)
82 ahc_print_register(NULL, 0, "SIMODE1", 0x11, regvalue, cur_col, wrap)
[all …]
H A Daic79xx_reg.h_shipped19 ahd_print_register(NULL, 0, "INTSTAT", 0x01, regvalue, cur_col, wrap)
26 ahd_print_register(NULL, 0, "HS_MAILBOX", 0x0b, regvalue, cur_col, wrap)
33 ahd_print_register(NULL, 0, "SEQINTSTAT", 0x0c, regvalue, cur_col, wrap)
40 ahd_print_register(NULL, 0, "INTCTL", 0x18, regvalue, cur_col, wrap)
47 ahd_print_register(NULL, 0, "DFCNTRL", 0x19, regvalue, cur_col, wrap)
54 ahd_print_register(NULL, 0, "DFSTATUS", 0x1a, regvalue, cur_col, wrap)
61 ahd_print_register(NULL, 0, "SG_CACHE_SHADOW", 0x1b, regvalue, cur_col, wrap)
68 ahd_print_register(NULL, 0, "SCSISEQ0", 0x3a, regvalue, cur_col, wrap)
75 ahd_print_register(NULL, 0, "SCSISEQ1", 0x3b, regvalue, cur_col, wrap)
82 ahd_print_register(NULL, 0, "DFFSTAT", 0x3f, regvalue, cur_col, wrap)
[all …]
/linux/include/linux/mlx5/
H A Dmlx5_ifc_vdpa.h8 MLX5_VIRTIO_Q_EVENT_MODE_NO_MSIX_MODE = 0x0,
9 MLX5_VIRTIO_Q_EVENT_MODE_QP_MODE = 0x1,
10 MLX5_VIRTIO_Q_EVENT_MODE_MSIX_MODE = 0x2,
14 MLX5_VIRTIO_EMULATION_VIRTIO_QUEUE_TYPE_SPLIT = 0,
26 u8 virtio_q_type[0x8];
27 u8 reserved_at_8[0x5];
28 u8 event_mode[0x3];
29 u8 queue_index[0x10];
31 u8 full_emulation[0x1];
32 u8 virtio_version_1_0[0x1];
[all …]
H A Dmlx5_ifc_fpga.h36 u8 max_num_qps[0x10];
37 u8 reserved_at_10[0x8];
38 u8 total_rcv_credits[0x8];
40 u8 reserved_at_20[0xe];
41 u8 qp_type[0x2];
42 u8 reserved_at_30[0x5];
43 u8 rae[0x1];
44 u8 rwe[0x1];
45 u8 rre[0x1];
46 u8 reserved_at_38[0x4];
[all …]
/linux/include/dt-bindings/clock/
H A Domap4.h8 #define OMAP4_CLKCTRL_OFFSET 0x20
12 #define OMAP4_MPU_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
15 #define OMAP4_DSP_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
18 #define OMAP4_L4_ABE_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
19 #define OMAP4_AESS_CLKCTRL OMAP4_CLKCTRL_INDEX(0x28)
20 #define OMAP4_MCPDM_CLKCTRL OMAP4_CLKCTRL_INDEX(0x30)
21 #define OMAP4_DMIC_CLKCTRL OMAP4_CLKCTRL_INDEX(0x38)
22 #define OMAP4_MCASP_CLKCTRL OMAP4_CLKCTRL_INDEX(0x40)
23 #define OMAP4_MCBSP1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x48)
24 #define OMAP4_MCBSP2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x50)
[all …]
H A Domap5.h8 #define OMAP5_CLKCTRL_OFFSET 0x20
12 #define OMAP5_MPU_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20)
15 #define OMAP5_MMU_DSP_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20)
18 #define OMAP5_L4_ABE_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20)
19 #define OMAP5_AESS_CLKCTRL OMAP5_CLKCTRL_INDEX(0x28)
20 #define OMAP5_MCPDM_CLKCTRL OMAP5_CLKCTRL_INDEX(0x30)
21 #define OMAP5_DMIC_CLKCTRL OMAP5_CLKCTRL_INDEX(0x38)
22 #define OMAP5_MCBSP1_CLKCTRL OMAP5_CLKCTRL_INDEX(0x48)
23 #define OMAP5_MCBSP2_CLKCTRL OMAP5_CLKCTRL_INDEX(0x50)
24 #define OMAP5_MCBSP3_CLKCTRL OMAP5_CLKCTRL_INDEX(0x58)
[all …]
H A Ddra7.h8 #define DRA7_CLKCTRL_OFFSET 0x20
12 #define DRA7_MPU_MPU_CLKCTRL DRA7_CLKCTRL_INDEX(0x20)
15 #define DRA7_DSP1_MMU0_DSP1_CLKCTRL DRA7_CLKCTRL_INDEX(0x20)
18 #define DRA7_IPU1_MMU_IPU1_CLKCTRL DRA7_CLKCTRL_INDEX(0x20)
21 #define DRA7_IPU_CLKCTRL_OFFSET 0x50
23 #define DRA7_IPU_MCASP1_CLKCTRL DRA7_IPU_CLKCTRL_INDEX(0x50)
24 #define DRA7_IPU_TIMER5_CLKCTRL DRA7_IPU_CLKCTRL_INDEX(0x58)
25 #define DRA7_IPU_TIMER6_CLKCTRL DRA7_IPU_CLKCTRL_INDEX(0x60)
26 #define DRA7_IPU_TIMER7_CLKCTRL DRA7_IPU_CLKCTRL_INDEX(0x68)
27 #define DRA7_IPU_TIMER8_CLKCTRL DRA7_IPU_CLKCTRL_INDEX(0x70)
[all …]
/linux/tools/testing/selftests/bpf/
H A Dip_check_defrag_frags.h10 0x45, 0x0, 0x0, 0x2c, 0x0, 0x1, 0x20, 0x0, 0x40, 0x11,
11 0xac, 0xe8, 0x0, 0x0, 0x0, 0x0, 0xac, 0x10, 0x1, 0xc8,
12 0xbe, 0xee, 0xbe, 0xef, 0x0, 0x3a, 0x0, 0x0, 0x54, 0x48,
13 0x49, 0x53, 0x20, 0x49, 0x53, 0x20, 0x54, 0x48, 0x45, 0x20,
14 0x4f, 0x52, 0x49, 0x47,
17 0x45, 0x0, 0x0, 0x2c, 0x0, 0x1, 0x20, 0x3, 0x40, 0x11,
18 0xac, 0xe5, 0x0, 0x0, 0x0, 0x0, 0xac, 0x10, 0x1, 0xc8,
19 0x49, 0x4e, 0x41, 0x4c, 0x20, 0x4d, 0x45, 0x53, 0x53, 0x41,
20 0x47, 0x45, 0x2c, 0x20, 0x50, 0x4c, 0x45, 0x41, 0x53, 0x45,
21 0x20, 0x52, 0x45, 0x41,
[all …]
/linux/drivers/tty/serial/
H A Dsunsab.h11 u8 rfifo[0x20]; /* Receive FIFO */
24 u8 ccr0; /* Channel Configuration Register 0 */
33 u8 isr0; /* Interrupt Status 0 */
42 u8 xfifo[0x20]; /* Transmit FIFO */
69 u8 imr0; /* Interrupt Mask Register 0 */
78 u8 __pad1[0x20];
128 #define SAB82532_ALLS 0x00000001
129 #define SAB82532_XPR 0x00000002
130 #define SAB82532_REGS_PENDING 0x00000004
133 #define SAB82532_RSTAT_PE 0x80
[all …]
/linux/arch/arm/boot/dts/intel/axm/
H A Daxm55xx.dtsi32 #clock-cells = <0>;
38 #clock-cells = <0>;
44 #clock-cells = <0>;
51 reg = <0x20 0x10020000 0 0x20000>;
58 #address-cells = <0>;
60 reg = <0x20 0x01001000 0 0x1000>,
61 <0x20 0x01002000 0 0x2000>,
62 <0x20 0x01004000 0 0x2000>,
63 <0x20 0x01006000 0 0x2000>;
97 reg = <0x20 0x10030000 0 0x2000>;
[all …]
/linux/sound/drivers/opl4/
H A Dyrw801.c40 snd_opl4_read_memory(opl4, buf, 0x001200, 15); in snd_yrw801_detect()
43 snd_opl4_read_memory(opl4, buf, 0x1ffffe, 2); in snd_yrw801_detect()
44 if (buf[0] != 0x01) in snd_yrw801_detect()
46 dev_dbg(opl4->card->dev, "YRW801 ROM version %02x.%02x\n", buf[0], buf[1]); in snd_yrw801_detect()
47 return 0; in snd_yrw801_detect()
58 {0x14, 0x27, {0x12c,7474,100, 0,0,0x00,0xc8,0x20,0xf2,0x13,0x08,0x0}},
59 {0x28, 0x2d, {0x12d,6816,100, 0,0,0x00,0xc8,0x20,0xf2,0x14,0x08,0x0}},
60 {0x2e, 0x33, {0x12e,5899,100, 0,0,0x00,0xc8,0x20,0xf2,0x14,0x08,0x0}},
61 {0x34, 0x39, {0x12f,5290,100, 0,0,0x00,0xc8,0x20,0xf2,0x14,0x08,0x0}},
62 {0x3a, 0x3f, {0x130,4260,100, 0,0,0x0a,0xc8,0x20,0xf2,0x14,0x08,0x0}},
[all …]
/linux/include/linux/mfd/da9063/
H A Dregisters.h18 /* Page 0 : I2C access 0x000 - 0x0FF SPI access 0x000 - 0x07F */
19 /* Page 1 : SPI access 0x080 - 0x0FF */
20 /* Page 2 : I2C access 0x100 - 0x1FF SPI access 0x100 - 0x17F */
21 /* Page 3 : SPI access 0x180 - 0x1FF */
22 #define DA9063_REG_PAGE_CON 0x00
25 #define DA9063_REG_STATUS_A 0x01
26 #define DA9063_REG_STATUS_B 0x02
27 #define DA9063_REG_STATUS_C 0x03
28 #define DA9063_REG_STATUS_D 0x04
29 #define DA9063_REG_FAULT_LOG 0x05
[all …]
/linux/drivers/net/wan/
H A Dhd64572.h4 * CPU modes 0 & 2.
15 * PC300 initial CVS version (3.4.0-pre1)
25 #define ILAR 0x00
28 #define PABR0L 0x20 /* Physical Addr Boundary Register 0 L */
29 #define PABR0H 0x21 /* Physical Addr Boundary Register 0 H */
30 #define PABR1L 0x22 /* Physical Addr Boundary Register 1 L */
31 #define PABR1H 0x23 /* Physical Addr Boundary Register 1 H */
32 #define WCRL 0x24 /* Wait Control Register L */
33 #define WCRM 0x25 /* Wait Control Register M */
34 #define WCRH 0x26 /* Wait Control Register H */
[all …]
/linux/drivers/video/fbdev/
H A Dsm712fb.c71 .red = {16, 8, 0},
72 .green = {8, 8, 0},
73 .blue = {0, 8, 0},
78 .nonstd = 0,
88 .type_aux = 0,
89 .xpanstep = 0,
90 .ypanstep = 0,
91 .ywrapstep = 0,
102 {"0x301", 640, 480, 8},
103 {"0x303", 800, 600, 8},
[all …]
/linux/drivers/scsi/
H A Daha152x.h16 #define SCSISEQ (HOSTIOPORT0+0x00) /* SCSI sequence control */
17 #define SXFRCTL0 (HOSTIOPORT0+0x01) /* SCSI transfer control 0 */
18 #define SXFRCTL1 (HOSTIOPORT0+0x02) /* SCSI transfer control 1 */
19 #define SCSISIG (HOSTIOPORT0+0x03) /* SCSI signal in/out */
20 #define SCSIRATE (HOSTIOPORT0+0x04) /* SCSI rate control */
21 #define SELID (HOSTIOPORT0+0x05) /* selection/reselection ID */
23 #define SCSIDAT (HOSTIOPORT0+0x06) /* SCSI latched data */
24 #define SCSIBUS (HOSTIOPORT0+0x07) /* SCSI data bus */
25 #define STCNT0 (HOSTIOPORT0+0x08) /* SCSI transfer count 0 */
26 #define STCNT1 (HOSTIOPORT0+0x09) /* SCSI transfer count 1 */
[all …]
/linux/include/linux/mfd/da9052/
H A Dreg.h14 #define DA9052_PAGE0_CON_REG 0
176 #define DA9052_PAGE_CONF 0X80
179 #define DA9052_STATUSA_VDATDET 0X80
180 #define DA9052_STATUSA_VBUSSEL 0X40
181 #define DA9052_STATUSA_DCINSEL 0X20
182 #define DA9052_STATUSA_VBUSDET 0X10
183 #define DA9052_STATUSA_DCINDET 0X08
184 #define DA9052_STATUSA_IDGND 0X04
185 #define DA9052_STATUSA_IDFLOAT 0X02
186 #define DA9052_STATUSA_NONKEY 0X01
[all …]

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